Via-in-Pad in itself can be a dangerous endeavor, but if good communication between all players in the design process is maintained than Via-in-Pad can be very successful.
You need to make sure the Designers are talking to the fabricator as to how the vias will be created and preferred diameters.
Then the Assembly folks need to be involved to see if their processes can be aligned for high yield or if some other configuration would be preferred.
Depending on whether you are planning through hole (I wouldn't recommend), blind or micro vias will make a huge difference.
Don't be afraid to ask everyone to participate in the design decisions.
As the Designer it may be necessary to set the rules of engagement, but that will still allow the downstream folks to help make the design as manufacturable as possible.
As our old friend Earl says "DFM-CE".
Effective ways to make Via-in-Pad (not inclusive):
1. Through hole (not a good idea as will likely create solder starvation problems)
2. Blind (multiple sub-categories)
A. Controlled depth (can leave voids and create "volcanic" actions during reflow)
B. Multiple Lamination (can be small diameter and virtually filled at final Cu plate)
C. Sequential Lamination (can leave small voids)
3. Micro (if you make them small enough no one will know they are there)
All of the various via types can be filled prior to final finish to minimize the possibility of void caused "volcanic" actions, though this adds cost at Fab it may well be offset by increased real estate savings, improved yields at assembly, etc.
Most important of all is make sure you communicate, it is the only way to make sure we all get to be successful.
Hope it helps,
FNK
Frank N Kimmey CID+
Principle PCB Designer
Powerwave Technologies
EDH 916-941-3159
FAX 916-941-3195
CEL 916-804-2491
-----Original Message-----
From: Daan Terstegge [mailto:[log in to unmask]]
Sent: Friday, June 25, 2004 8:29 AM
To: [log in to unmask]
Subject: Re: [TN] VIA in Pad
Hi Tom,
You will get voids in the solderjoints.
This is not necessarily a bad thing, but some would argue it is outside
the limits of the IPC-A-610. If you read it carefully, you will see that
IPC-A-610 gives a lot of freedom with respect to voiding (it suggests
some inpection criteria, that's all), so you have to ask the question if
everyone involved with the acceptance of the products is a carefull
reader.
Daan Terstegge
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
>>> [log in to unmask] 06/25/04 05:19pm >>>
We're a CM. One of our customers is asking us to build a board
assembly
that will be using BGAs with VIAs in pads. They are in the design
stages at
this point, and we have some concerns with having a Via in the middle
of a
BGA pad. Anyone have suggestions and/or experience with this??
Thanks
Tom Parkinson - Quality System Manager - CIT
WinTronics, Inc.
Ph: 724-981-5770 Ext. 235
Fax: 724-981-1772
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