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November 2005

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Subject:
From:
Gary Ferrari <[log in to unmask]>
Reply To:
Date:
Wed, 23 Nov 2005 10:43:14 -0500
Content-Type:
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Franklin,

you are correct, my error. One must planarize when filling buried vias.

Gary

Franklin Asbell wrote:
> That sounds like one strange process??? Are you describing the plating
> 'knee'? Why would you need to "planarize" buried vias? Did you mean filled
> vias?
>
> I must be way out of the loop on new processes...
>
> Franklin
>
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Gary Ferrari
> Sent: Wednesday, November 23, 2005 7:43 AM
> To: [log in to unmask]
> Subject: Re: [TN] Wrap Around Plating
>
> Roland,
>
> Plating wrap is a part of the plating that gets placed in a plated
> through hole and "wraps" over the surface conductor. There is concern
> that during a planarization process (during the creation of buried vias)
> that the surface plating is compromised. Experiments have shown that the
> reliability of the plated through hole is compromised when this plating
> is removed.
>
> Regards,
>
> Gary Ferrari
> Ferrari Technical Services
> 860-350-9300
>
> Roland Jaquet wrote:
>
>>Very confusing, I know edge plating since 20 years but I don't think it is
>>the meaning here, I found ..
>>
>>see:  http://www.precisioneagles.com/PrecisionSurface/wrap_around.htm
>>
>>
>>
>>Thank you for your help and replies
>>
>>Meilleures salutations
>>Best Regards
>>Rol@nd
>>
>>www.PCBspecialist.com
>>
>>-----Original Message-----
>>From: TechNet [mailto:[log in to unmask]] On Behalf Of Lee parker
>>Sent: Wednesday, November 23, 2005 4:58 AM
>>To: [log in to unmask]
>>Subject: Re: [TN] Wrap Around Plating
>>
>>This is also a very good technique for containing the EMI radiation
>>component that is produced by the internal circuitry and escapes through
>>the edge of the board provided the edge plating is grounded.
>>
>>Best regards
>>
>>Lee
>>
>>J. Lee Parker, Ph.D.
>>JLP Consultants LLC
>>804 779 3389
>>  ----- Original Message -----
>>  From: Franklin Asbell<mailto:[log in to unmask]>
>>  To: [log in to unmask]<mailto:[log in to unmask]>
>>  Sent: Tuesday, November 22, 2005 5:55 PM
>>  Subject: Re: [TN] Wrap Around Plating
>>
>>
>>  You may be describing edge plating, I'll explain.
>>
>>  There are times when a connection needs to be made from the top to the
>>  bottom of a board and the only real estate is the board edge.
>>
>>  The board is processed normally until electroless copper where it is
>>routed
>>  to expose the edge needing the connection.
>>
>>  The board/panel is processed normally through final rout.
>>
>>  At it's completion those areas routed before 1st copper now have an
>>  electrical connection between the top and bottom.
>>
>>  When viewed from the top/side it can appear as though metal were formed
>>or
>>  wrapped around the edge I suppose.
>>
>>  Franklin
>>
>>  -----Original Message-----
>>  From: TechNet [mailto:[log in to unmask]] On Behalf Of Roland Jaquet
>>  Sent: Tuesday, November 22, 2005 4:45 PM
>>  To: [log in to unmask]<mailto:[log in to unmask]>
>>  Subject: [TN] Wrap Around Plating
>>
>>  Dear Technetters,
>>
>>  I am a bit confused about a terminology - I checked the archives with no
>>  better understanding.
>>
>>  Wrap Around Plating
>>
>>  The occurrence and usage of those three words are no clear about what is
>>  understood within the PCB industry ..
>>
>>  Are we talking to protective films / masks / resists
>>
>>  Or plating on surface, sides, of feature?
>>
>>  Or about a packaging including embedded features
>>
>>  Is this an other one we don't use but abuse?
>>
>>
>>
>>  Thank you for your help
>>
>>  Best Regards
>>  Rol@nd<mailto:Rol@nd>
>>
>>  www.PCBspecialist.com<http://www.pcbspecialist.com/>
>>
>>
>>  Jaquet Roland
>>  Consultant
>>  PCBspecialist
>>  14 Champ Budin
>>  1258 Perly, GENEVA
>>  Switzerland
>>  [log in to unmask]<mailto:[log in to unmask]>
>>  tel:
>>  fax:
>>  mobile:
>>  41228800405
>>  41228800409
>>  41792033723
>>
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