I am trying to gain a better understanding of when to use (or not use) V-I-P technology.

Can anyone tell me when it is NOT a good practice to use V-I-P technology?  What are the pros and cons to using them?  What about using a via for two components that are back-to-back (opposite sides of the board) which share the same net?

A fellow designer, an EE (or two) and even a Director of Engineering at my place feels (strongly, I might add) that it is not good practice; that there are substantial risks with it that are not worth taking (based on info gleaned using Google).

The layouts I do are primarily for airborne electronics.  The board in question is not too dense, so I am able to use standard technology in terms of via placement.  However, there are a few tight places where I readily used V-I-P, but...

Any input/insights will be greatly appreciated!

Bill Gebhardt, C.I.D. +
PCB Designer
Mission Systems
General Atomics Aeronautical Systems, Inc.
Bldg A03-1381D
16761 Via Del Campo Ct
San Diego, CA  92127

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