Thanks all! Very helpful information!
I will only be utilizing V-I-P for those ICs having a thermal pad under them. Thus, limiting my use of them across the board.
Thanks and have a great week!
Bill Gebhardt, C.I.D. +
PCB Designer
Mission Systems
General Atomics Aeronautical Systems, Inc.
Bldg A03-1381D
16761 Via Del Campo Ct
San Diego, CA 92127
Office: (858) 762-5035
Cell: (909) 229-7824
Fax: (858) 762-5939
Email: [log in to unmask]<mailto:[log in to unmask]>
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From: Jack Olson [mailto:[log in to unmask]]
Sent: Monday, January 23, 2017 9:02 AM
To: (Designers Council Forum) <[log in to unmask]>; Gebhardt, Bill <[log in to unmask]>
Subject: -EXT-Re: [DC] Via In Pad technology
It is probably more common to use Via-in-Pad for blind vias, or in HDI designs,
to tie signals to PWR/GND planes, or to get the signal to an inner layer where there is more room for routing.
V-I-P using vias that are drilled all the way through the board will have more headaches for you in manufacturing (and higher cost)
On Fri, Jan 20, 2017 at 9:16 AM, Gebhardt, Bill <[log in to unmask]<mailto:[log in to unmask]>> wrote:
I am trying to gain a better understanding of when to use (or not use) V-I-P technology.
Can anyone tell me when it is NOT a good practice to use V-I-P technology? What are the pros and cons to using them? What about using a via for two components that are back-to-back (opposite sides of the board) which share the same net?
A fellow designer, an EE (or two) and even a Director of Engineering at my place feels (strongly, I might add) that it is not good practice; that there are substantial risks with it that are not worth taking (based on info gleaned using Google).
The layouts I do are primarily for airborne electronics. The board in question is not too dense, so I am able to use standard technology in terms of via placement. However, there are a few tight places where I readily used V-I-P, but...
Any input/insights will be greatly appreciated!
Bill Gebhardt, C.I.D. +
PCB Designer
Mission Systems
General Atomics Aeronautical Systems, Inc.
Bldg A03-1381D
16761 Via Del Campo Ct
San Diego, CA 92127
Office: (858) 762-5035<tel:%28858%29%20762-5035>
Cell: (909) 229-7824<tel:%28909%29%20229-7824>
Fax: (858) 762-5939<tel:%28858%29%20762-5939>
Email: [log in to unmask]<mailto:[log in to unmask]><mailto:[log in to unmask]<mailto:[log in to unmask]>>
The information contained in this electronic message is intended only for the use of the individual or entity to which it is addressed and may contain information that is privileged, confidential and exempt from disclosure under applicable law. This message may also contain technical data, export of which is restricted by the International Traffic in Arms Regulations (ITAR). Disclosure to foreign persons without prior U.S. Government approval is prohibited. Violations of these export laws and regulations are subject to severe civil and criminal penalties.
This message may include Company Sensitive and/or Proprietary Information. If the reader of this message is not the intended recipient, you are informed that any dissemination, copying or disclosure of the material contained herein, in whole or in part, is strictly prohibited. If you received this message in error, please notify the sender by reply e-mail and delete all copies of this message.
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