Jack,
I don't plug thermal vias with anything. I just make them small and control the placement of the solder paste.
Thermal vias under a part that needs to be a primary path in a heatsink tab that transfers the thermal energy into the planes or a copper fill on the board someplace needs to be in intimate contact with the heat source. Otherwise the part will not get the thermal transfer of energy so well. Soldermask in the holes will present problems in soldering to the heat tab on the part creating thermal resistance. Partial plugging only traps moisture or contaminates in the holes which will spew out of the holes when heating at reflow causing assembly headaches... solder balls, and voids.
What I have found is really pretty simple and a cost saver... I use small diameter vias... (8 mil)... which work as the thermal conduit and are small enough that the capillary action of them is minimal... typically the solder paste needs to be patterned to avoid the holes in the vias so that in reflow the solder will spread across the pad as the part settles from the heat and melting of the solder and very little into the holes . This allows the flux to activate and outgas... and some of the solder will wick into the plated thru holes.
Thermal transfer is dependent on the copper content of the path from the part to the heat sink and then to the air. Solder itself is actually a very poor thermal conductor compared to copper. Filling with solder doesn't appreciably increase the thermal transfer characteristics. In some applications, I increased the copper thickness in the plated holes to improve the thermal conductivity. This can be a reasonable cost tradeoff... and only facilities that understand heavy copper plating in vias should be used.
My mechanical engineer did thermal analysis of the via structures and we proved that this works. He presented a paper on it at SMTA.
Control of the paste through pattern application helps with avoiding solder balls and solder voids... Going with larger diameter vias will tend to wick more and you may get unwanted solder bumps on the bottom of the assembly or solder that wicks out the bottom causing a solder starved part...
Instead of larger vias, use more small vias. No via plugging will be needed.
While plated and planarized vias that are plated shut with copper might seem like a viable option, the process costs more, and the 'copper pillars or nails' you’ve created with the plated shut solid copper vias will have a pretty large CTE difference from the surrounding board epoxy and with thermal cycling you may find it tends to tear up the board material as it grows in length and shrinks in length over extreme temperatures... just be careful and know the environment you are exposing the board to.
Just my two cents... great question and comments. :)
William Brooks, CID+
Printed Circuit Designer
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Carlsbad, CA 92010-6603
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