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December 2005

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From:
Lee parker <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Lee parker <[log in to unmask]>
Date:
Thu, 22 Dec 2005 15:05:32 -0500
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Paul

There is an understandable reason for this behavior. It is normally referred to as a scale effect. As I showed in a paper I presented at IPC EXPO last Feb the strains in a freely expanding PCB are proportional to the size and thickness of the board. If these ratios are not reflected in the coupon the then the coupon is not relevant to the board.

Best regards

Lee

J. Lee Parker, Ph.D.
JLP Consultants LLC
804 779 3389 
  ----- Original Message ----- 
  From: paul reid<mailto:[log in to unmask]> 
  To: [log in to unmask]<mailto:[log in to unmask]> 
  Sent: Thursday, December 22, 2005 9:13 AM
  Subject: Re: [TN] ] Qualification of the Pb-free capable manufacturers


  I have to agree with Valerie.  Solder float has been demonstrated to be a
  very much hit or miss test.  My main concern is the number of holes examined
  are small and the ability to find interconnect failure or delamination is
  severely limited by the random nature of microsectioning.

  My experience is that known unreliable boards can pass the solder float
  tests.  We have had coupons that fail thermal cycling in just tens of cycles
  and the fabricator argues the same board passed solder float with no
  problem.  Those confrontations digress into a game of spec-man-ship while
  the boards fail in assembly.


  It is the nature of the solder float test that limits it's usefulness.  This
  test method was developed in the early 1960s when the industry was
  attempting to simulate the stresses associated with wave and hand soldering
  assembly techniques.  The times and temperatures now experienced during
  surface mount assembly have little to no relationship to the immediate
  intense thermal stress experienced during a solder float test.

  As processes and materials evolved the response has been to add the number
  of solder float cycles or increase the temperatures.  What we need is to get
  away from the "gerry-rigging mentality" and evolve to a more representative
  and realistic test methodology.

  To understand the stresses associated with today's assembly we need to
  create a temperature profile representative of what the product experiences
  during surface mount assembly and rework procedure.  Not that we have to
  create and exact thermal profile but rather a standard, reproducible profile
  that does not change.

  Understand that the damage done in assembly and rework is accumulative and
  not always expressed at the time of assembly and rework.  There are plenty
  of times when the failure occurs during the thermal cycle but frequently the
  failure occur during burn-in or in the first few days of use.

  All testing needs to take into account the interactions of the fabrication
  process results (copper thickness etc.) in the light of the materials
  capabilities.  It is not just each individual element in the circuit board
  it is the sum total a all elements coming together, affecting reliability.

  Testing raw material is useful but cannot replace testing the material in
  the fabricate condition.

  Our company frequently tests different materials for our customers and we
  have found the same material can have two different results processed at two
  different fabricators.  Material "A" may work well in one fabricator process
  and fair poorly with a different fabricator.  The difference appears to be
  that fabricators tweak their process to accommodate a given material.  They
  make subtle changes to lamination cycles, drill feeds and speeds and hole
  preparation to accommodate a material.  Competent fabricators will not
  accept a job with a new material without running tests to understand how
  that material will fair in their shop.

  Some materials work well in single lamination processes only.  Exposed to
  sequential lamination they fair poorly.

  So the correct answer is everything, the fabrication process, the assembly
  process, the end use environment counts in establishing a materials'
  reliability.  That means you need a lot of open kimonos for a fair
  evaluation.

  I think the best bet is to invoke reliability testing using coupons
  fabricated with the materials of interest by fabricators of interest.  Then
  you "baseline" your fabricators and select the materials that meets your
  needs best.  Of course since we just released this new capability, we
  recommend the coupon should have delamination detection circuits.

  Every build is an adventure but, are going into it prepared, or an unwitting
  member of "Survivor - PCB"?


  Sincerely,

  Paul Reid


  Program Coordinator
  PWB Interconnect Solutions Inc.

  Tel:  613-596-4244 Ext. 229
  Fax: 613-596-2200

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