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June 2004

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Subject:
From:
Dwight Mattix <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 25 Jun 2004 10:33:55 -0700
Content-Type:
text/plain
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text/plain (143 lines)
At 09:47 AM 6/25/2004 -0700, Mcmaster, Michael wrote:
>Jeff and Roger - You've both proposed these vias be filled with conductive
>via fill.  But the fill does not need to be conductive.  We've used both
>types of fill materials and found the non-conductive to have superior
>processing capability.

Mike,
I concur.

Also, note that when using conductive fill we've seen
periodic/unpredictable delam/pad lifting in dense via areas (e.g. thermal
via farms in gnd under P/A's).

Typical conductive via fill (e.g. CB100) is more expansive than
non-conductive fills (e.g. Peters, Macuvia, Taiyo 100% solids) and since
the conductive fill typically plates over nicely, the via fill acts as a
"piston" to push up the overplating "cylinder head."  At that point the via
overplate takes the surface copper foil it's attached to up and off with it.

In general we only spec conductive fill when we need an uninterrupted
planar area or a complete pad such as for probe contacts under
ATE/Loadboard sockets.  Even those cards are trending away as DUT
density/pitch gets tighter and we convert to uVia stackups on testers (in
that case outerlayer uFill type uVia plating is the neatest thing since
sliced bread).


Bottom line:
Beware conductive fills -- especially in thermal via farms.
Bias yourself toward 100% solids, non-conductive fill wherever practiable.

cheers,
Dwght


>Mike McMaster
>RF Product Engineer
>Merix Corporation
>503-992-4263
>
>
>
> > ----------
> > From:         Jeffrey Bush[SMTP:[log in to unmask]]
> > Reply To:     TechNet E-Mail Forum.;Jeffrey Bush
> > Sent:         Friday, June 25, 2004 9:20 AM
> > To:   [log in to unmask]
> > Subject:      Re: [TN] VIA in Pad
> >
> > I will suggest a conductive via fill in these areas to provide a flat
> > SMT site, because - solder joint could be starved by flow down into the
> > via.  Also Sm plugged on the opposite side will also cause excessive
> > voiding as the capped via will provide a good outgassing effect during
> > relow.  Not the cheapest solution but is effective in hiding vias in
> > pad.
> >
> >
> >
> > Jeffrey Bush
> > Director, Quality Assurance and Technical Support
> >
> >                           76 Technology Drive - POB 1890
> >                              Brattleboro, Vermont 05302-1890
> >                                 Tel. 802.257.4571.21 Fax. 802.257.0011
> >                                     [log in to unmask]
> >                               http://www.vtcircuits.com
> >
> >
> >
> > -----Original Message-----
> > From: Tom Parkinson [mailto:[log in to unmask]]
> > Sent: Friday, June 25, 2004 11:14 AM
> > To: [log in to unmask]
> > Subject: [TN] VIA in Pad
> >
> >
> > We're a CM.  One of our customers is asking us to build a board assembly
> > that will be using BGAs with VIAs in pads.  They are in the design
> > stages at this point, and we have some concerns with having a Via in the
> > middle of a BGA pad.  Anyone have suggestions and/or experience with
> > this??
> >
> > Thanks
> >
> >
> > Tom Parkinson - Quality System Manager - CIT
> > WinTronics, Inc.
> > Ph: 724-981-5770 Ext. 235
> > Fax: 724-981-1772
> >
> >
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