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Reply To: | TechNet E-Mail Forum. |
Date: | Tue, 10 Mar 1998 10:01:20 -0700 |
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Michael,
Coming from the ICT field and not much experience from the SM field, I
will suggest the following,...of course at the board design level of
things which doesn't help you too much but maybe it can help.
Not knowing the board layout, I would say that it is a better bet to
design in test pads for the pins as opposed to trying to deal with the
pin shape and via's. I wonder if the ICT equipment is set up for Clam
Shell type fixtures? These tend to help.
Richard Hamilton
Clemar Mfg. / Rain Bird
[log in to unmask]
> -----Original Message-----
> From: MICHAEL DODSON [SMTP:[log in to unmask]]
> Sent: Monday, March 09, 1998 8:41 AM
> To: [log in to unmask]
> Subject: [TN] Vias filled with solder for ICT testing
>
> Hello,
>
> Searching for feedback on the requirements for ICT testing.
>
> a.) Do the vias need to be filled with solder?
> b.) Do the probes need to make contact with the center of the via
> or should the probe contact the via pad only?
>
> I have a customer who is requiring the solder side vias be filled
> with solder and the component side vias plugged with mask. I've
> explained that via plugging with mask is not an issue, but I can not
> guarantee 100% solder filled vias after HASL. The customer is telling
> me their ICT test fixture needs to probe the center of the via.
> (10 layer board / double sided SMT's)
>
> What is your experience and advice?
>
> Michael Dodson
>
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