Al--
     We design avionics hardware for the military business, what there is
     left of it. We route either .006/.008 mil traces on internal layers 
     depending whether we are routing 3 or 4 traces between .040 pads on
     .100 spacings. We allow +/- .001 for phototooling features (generous
     considering we supply Gerber data) and +.000/-.002 for process 
     allowances. We usually have impedance requirements for specific layer
     pairs and allow the supplier to vary trace width and dielectric thickness
     to ensure that the pwb meets the end product impedance requirements.
     However, in NO case can the finished internal trace width be less
     than .004. Over the years, multiple suppliers have meet these requirements      with very few cases of a supplier asking for a wavier for a non-compliant
     board. I will admit, I am not sure of the impact to cost of these 
     requirements, but those are the design parameters required to meet the 
     electrical and mechanical constraints. Hope this wasn't too windy and
     helped somewhat (at least you know that your not alone). If you would like      to discuss this further, please feel free to contact me. Have a good day.

                                          Bob Vanech
                                          (203) 852-4810