TECHNET Archives

1995

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Reply To:
Date:
Wed, 27 Sep 95 15:32:17 PDT
Content-Type:
text/plain
Parts/Attachments:
text/plain (33 lines)
To someone familiar with PTFE Microwave Application PWB's:

We are looking at some very small pits (1-5 microinches) located 
sporadically on conductor traces.  The pits were obviously created by 
some minute contamination on the plated copper surface which left small
voids in the tin-lead electroplate.  In most cases, copper is exposed
at the bottom of the pit.  The etching process may have attacked the 
copper to varying degrees but we are unable to determine the depth of 
these pits into the copper conductor.

Specifications allow +/- 10% conductor width variation.  Nominal 
conductor widths are .088" on traces that exhibit these pits.  I mention 
this fact as it relates to controlled impedance.  The amount of copper 
loss due to the pitting condition could in no way add up the amount 
allowed by this specification (10% .088 = .0088 x conductor length) when 
on the low side of the tolerance.

What effect will these pits have on performance and long term 
reliability?

Will it create difficulties in 'tuning' the board for it's end use 
application?

Will the small amount of exposed copper pose any long term reliability
problems?

In advance, Thanks

Ralph Malloch - Process Enginnering




ATOM RSS1 RSS2