The other side of the coin is conductor or trace thickness 
        tolerance. For commercial applications the applicable criteria
        can be found in IPC-RB-276 (page 13). It takes into account the
        starting base foil and sets criteria for minimum finished 
        conductor thickness. Also plating/coating thickness of exposed
        copper on non-solderable surfaces is permitted to be 1% for 
        class 3 (Microwave). 
                I understand your concerns regarding possible degraded
        electrical performance. You might want to try your worst case
        scenario and see what effect electrically these surface anomalies
        may have. If nothing is effected and it meets the other thickness
        criteria than the minor exposed copper spots should not effect
        your long term reliability any more than the possibility of 
        any exposed copper edges along traces. (Provided the surface 
        finish is that type that has exposed copper along edges.)

Hadco Printed Circuits
Tech Center Two / Watsonville                


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Dave Hoover              
(408) 728-6677 Senior Process Engineer  
(408) 728-1728 Fax [log in to unmask]


______________________________ Reply Separator _________________________________
Subject: Pitting Condition on PTFE PWB's
Author:  [log in to unmask] at SMTPLINK-HADCO
Date:    9/27/95 9:59 PM


To someone familiar with PTFE Microwave Application PWB's:
     
We are looking at some very small pits (1-5 microinches) located 
sporadically on conductor traces.  The pits were obviously created by 
some minute contamination on the plated copper surface which left small 
voids in the tin-lead electroplate.  In most cases, copper is exposed 
at the bottom of the pit.  The etching process may have attacked the 
copper to varying degrees but we are unable to determine the depth of 
these pits into the copper conductor.
     
Specifications allow +/- 10% conductor width variation.  Nominal 
conductor widths are .088" on traces that exhibit these pits.  I mention 
this fact as it relates to controlled impedance.  The amount of copper 
loss due to the pitting condition could in no way add up the amount 
allowed by this specification (10% .088 = .0088 x conductor length) when 
on the low side of the tolerance.
     
What effect will these pits have on performance and long term 
reliability?
     
Will it create difficulties in 'tuning' the board for it's end use 
application?
     
Will the small amount of exposed copper pose any long term reliability 
problems?
     
In advance, Thanks
     
Ralph Malloch - Process Enginnering