TECHNET Archives

June 2019

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Wayne Thayer <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Wayne Thayer <[log in to unmask]>
Date:
Wed, 12 Jun 2019 06:49:28 -0700
Content-Type:
text/plain
Parts/Attachments:
text/plain (15 lines)
We're trying to work through IPC guidelines for conformal coat inspection.

What is the difference between a "void", which is allowed (but a process
indicator) if the void doesn't expose conductors, and a "no coat", where
"areas" specified for conformal coat are not completely covered?

We have some tough masking requirements. Not only are they intricate, but
we don't have tolerance information on the drawings. Clearly need to
straighten that out, but we still want to be able to agree with suppliers
on "void" vs "no coat".

Thanks!

Wayne Thayer

ATOM RSS1 RSS2