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Date: | Wed, 12 Jun 2019 19:17:06 +0000 |
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At Plexus we consider a "void" to be a complete lack of coating and not acceptable.
We prefer to use the term "bubble" rather than void in most cases and to be a process indicator "if " once the bubble is popped there is evidence of coating at the PCB interface or conductors.
Bubbles are only a defect if between or on conductors and once popped exhibit a lack of coating on the conductor surface.
Rich Kraszewski
Senior Staff Process Engineer
Phone: (920) 969-6075
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-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Wayne Thayer
Sent: Wednesday, June 12, 2019 8:49 AM
To: [log in to unmask]
Subject: [TN] Conformal Coat Masking: Voids vs No Coat
[EXTERNAL] This email was sent from outside of Plexus. Use caution when opening attachments or links from unknown senders.
.
We're trying to work through IPC guidelines for conformal coat inspection.
What is the difference between a "void", which is allowed (but a process
indicator) if the void doesn't expose conductors, and a "no coat", where "areas" specified for conformal coat are not completely covered?
We have some tough masking requirements. Not only are they intricate, but we don't have tolerance information on the drawings. Clearly need to straighten that out, but we still want to be able to agree with suppliers on "void" vs "no coat".
Thanks!
Wayne Thayer
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