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August 1999

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From:
Peter Ling <[log in to unmask]>
Date:
Tue, 31 Aug 1999 15:39:59 +1200
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"TechNet E-Mail Forum." <[log in to unmask]>, Peter Ling <[log in to unmask]>
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A question for board designers and others? - Ive been challenged to come up
with a reasonably simple method of identifying PWB design complexity.
Gone are the days of - hey that's a tight board. I'm only dealing with 2
layer boards.
I have a couple of possibilities for SMT/mixed - number of component
connections plus vias over the area of the board or total component area
over the board area. My problem is getting relativity with our power boards
that have small component counts, large complex plane areas of solid or
hatched copper and generally a large board size. Any help would be
appreciated
Thanks - Peter

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