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1995

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[log in to unmask] (MR NORMAN S EINARSON)
Date:
Thu, 26 Oct 1995 17:43:57 EDT
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Response to Joe Fjelstad

Received your response on ultra-fine lines/small via holes.  After 
receiving your response, I decided it would be interesting to meet 
with the people making the claim.  Unfortunately, they will part with 
the specific process as it is proprietary.  I guess I can understand 
their position but I sure would like to know more about this process 
also.

I guess this is the old case of the cart before the horse.  When the 
industry went from 12 mil lines to 8 mil lines, the fabricator had to 
go through a learning curve.  From 8 mil to 4 mil, another learning 
curve.  This has been our method of moving into higher technology 
since the inception of PWB's.  However, we have just about reached 
the limit of process materials and equipment in today's technology.  
To go beyond 5 mil outers and 4 mil inners, must include a high yield 
loss and considerably higher pricing. Sure, some shops claim 2 and 3 
mil traces on inner layers.  However, these are not feasable on 
production quantities.  Of course, many things are possible if yields 
and extreme cost is not a consideration.

There is little question that the future is going to require 1 and 2 
mil traces with very small via's. These people claim to be able to 
meet 1 mil trace requirements and 1 mil via's.  However, at the 
present time, I don't know of any design requiring this level of 
technology.  Nor do I know of anyone that would move into this type 
of design without first having a manufacturing source.  This time, we 
may a source before the design is created.  They claim to be ready 
and waiting for the design community to make their next move.

My immediate concern is quality and reliability of a process I know 
nothing about.  I brought this up to these people and they suggested 
the following.  Find someone with very dense requirements of 2, 3, or 
4 mil traces on a current design.  Let them make a sample board and 
also allow them to replace their via's with very small via's.  The 
sample board could be used for testing purposes, including any 
destructive testing requirements to verify a quality process.  
Evidently, blind and buried via's are no problem with this process, 
and available at a much reduced price than current technology.  
Whoever submits a design for evaluation, would now have a source to 
go to for future 1 mil trace boards and could then begin going in 
that direction.  I can also see a future for MCM-L boards using this 
process if testing proves successful on a sample board.

OK, any takers for a sample board?  If your have very dense 
requirements, and are looking for an opportunity to test this 
procedure, call Ed Berg directly at (603) 472-7068.  It's in your 
court now!

Regards,

Norm Einarson
Printed Circuit Technology  



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