Flux will definitely affect bridging. I have no experience with OA or
noclean, but higher gravity rosin flux will prevent bridges. Lower
gravity will decrease skips on SMT chips.
Allen Ahlert
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Subject: Re[3]: Solder Bridges on SMT SOIC's
Author: [log in to unmask] at halsic_ccsmtp
Date: 8/4/95 7:46 AM
As per my last request for information on solder bridges on SOIC's,
Thank you very much for the input. I have another question for yuuuz guys ??
1. Will the use of a different solder help to reduce the Solder Bridging on
Wave Soldered SOIC's (We are planning to change from Kester Ultra-pure
to Alpha Hi-Flo).
2 Will the use of a different Flux or type of flux help reduce the same
problem ie: from OA water soluble to no clean. Or even a different
manufacture ( we are currently using Alpha 857, Water Soluble OA -
Alcohol based flux).
Any input would be great.
As ELVIS would say " THANK YOU VERY MUUUUUCH!!)
Eric Bernal, Manufact. Engineer
Pragmatech, Sunnyvale, CA
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Subject: Re[2]: Solder Bridges on SMT SOIC's
Author: [log in to unmask] at ~INTERNET
Date: 8/3/95 3:05 PM
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Subject: Re[2]: Solder Bridges on SMT SOIC's
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Andy,
We have the same problem on the solder bridges at SOICs. We are
going toward select soldering since even there is no bridge, there is
a big chance of getting excessive solder/ no stress relief on the last
two pins.
I have the following questions if you don't mind:
(1). What is your average defect rate?
(2). What kind of OA flux is the best based on your experience?
(3). Do you think low viscosity solder will help?
Cherng Wu
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Pragmatech Inc.
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Subject: re: Solder Bridges on SMT SOIC's
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Date: 7/31/95 8:32 AM
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From: ANDY RICHARDSON <[log in to unmask]>
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Subject: re: Solder Bridges on SMT SOIC's
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**ERROR** LONG FROM FIELD. FIELD WAS CUT. OLD FIELD WAS:
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Message-Id: <[log in to unmask]>Ref e-mail from Eric Bernal
at Pragmatech, Sunnyvale, Ca
Eric,
We at GenRad us the solder thief technique whereby and extra set of SOIC solder
pads are added to the last set of pads to see the solder wave. If all your IC's
are flowed in the same direction (i.e. the wave should pass along the length of
the IC) it then becomes a case of pads sizes and flux selection.
We use the IPC standard pad sizes for most devices including SOIC's which seem
to work.
Good luck!
Andy Richardson
GenRad UK
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