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Reply To: | DesignerCouncil E-Mail Forum. |
Date: | Wed, 22 Sep 1999 11:03:53 -0700 |
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Hi Ray,
Yeah, it has been quite a while since we spoke. I quit PowerWave to go to
Intel, but just as I was getting settled in I got an offer to move to a
small town between Tahoe and Sacramento called Grass Valley. We design for
digital TV here, love it.
Anyway, my reference is pages 15-19 of the IPC-2222 Proposal (not final) but
its all I have. Send me your fax number if you want a copy, ok?
new stuff:
Jack Olson - Nvision
vox (530) 265-1110
fax (530) 265-1055
125 Crown Point Court
Grass Valley, CA 95945
-----Original Message-----
From: Ray Humphrey [mailto:[log in to unmask]]
Sent: Wednesday, September 22, 1999 10:26 AM
To: DesignerCouncil E-Mail Forum.; Jack Olson
Subject: Re: Re: [DC] IPC Specs - Errors?
Hello, Jack! Long time, no talk to! Hope all is well with
you an yours.
Do you have any input on this dilemma? It's rather
difficult for me to
believe that for a Level A, 12" board we need to provide
0.040" (+/- 0.020)
allowance, in addition to the electrical clearance. As I
said in a previous
post, I could do that with a hand drill. Notice that this
is not the case
for the holes that are connected to the plane, they only
require half that
amount.
I hope Gary is having this investigated and is not going to
drop it. It
needs a definitive answer that will either acknowledge the
error or convince
us of why it is as stated.
BTW, do you know of anywhere in the IPC specs that the
clearance ring around
a thermal pad (between the ID and OD where the web segments
cross) is
addressed? The only thing I see is the minimum clearance,
referenced to a
standard pad in Figure 5-18 of IPC-D-275.
Ray Humphrey
DynaCad Design Services
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