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November 1998

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Subject:
Re: Via holes on SMD pads?
From:
"Hiteshew, Michael" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 5 Nov 1998 13:11:16 -0500
Content-Type:
text/plain
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Mike,
        See IPC-SM-782A, section 3.6.3.2.

 Michael Hiteshew
 Lockheed Martin Launching Systems
 [log in to unmask]
 (410) 682-1259


> Michael D. Meanor wrote:
>
> I have a customer that design their fab with a via hole in the center of
> the surface mount land pattern for all of their capacitors...snip
> I believe this is a design violation however, I do not know what criteria
> to reference and what violation this condition would be.
>
>

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