Here are the stats from one of my boards:

    Layout Statistics:
    -----------------
        Components:  Placed 809  Unplaced 0  Total 809
        Nets:  W/Rats 955  No/Rats 5  Total 960
        Pins:  W/Rats 3122  No/Rats 1651  Unused 576  Unplaced 0  Total 5349
        Equivalent ICs (1 pin = 1/14 EIC)  382
        RatTs              0
        Router Keepin (in) (-0.1500,-0.7500) by (5.2500,6.9550)
        Layout area (sq in) 41.6
        Layout density (sq in/EIC) 0.109
        Pin density (Pins/sq in) 128.560
        Average ratlength (in)  1.4
        Rat density (in/sq in) 73.429

    Connection Statistics:        W/Rats      No/Rats      Total
    ----------------------        ------      -------      -----
        Connections               2167        1646         3813
        Already Connected         2167        1646         3813
        Missing Connections          0           0            0
        Dangling Connections (See logfile)                    0
        Connection Completion      100.00%     100.00%      100.00%
        Manh Distance (inches)    3055.17
        Etch Length (inches)      4340.56       91.40      4431.95
        Number of vias            3559        1136         4695
        Vias per Connection          1.64        0.69         1.23
        Smd pins with attached clines                      3902

This board had the following:

Controlled impedance
Parallelism control
Tandem parallelism control (3 layer pairs)
Matched length differential pairs
Matched length star topology
Matched length from2s
Matched length nets

The board was 60% hand routed and 40% autorouted.

The layer count was 14 layers with 6 internal signal layers and only
pin-escapes allowed on the outer layers.

Time taken to do: 293.50 hours

> From [log in to unmask] Fri Oct  2 12:53:22 1998
> From: [log in to unmask]
> Original-From: [log in to unmask]
> Date: Fri, 2 Oct 1998 14:48:50 -0500
> To: [log in to unmask], [log in to unmask]
> Subject: Last PCB complexity
> Mime-Version: 1.0
> Content-Type> : > text/plain> ; > charset=us-ascii>
> Content-Transfer-Encoding: 7bit
> Content-Md5: qqxqJaTdSjizVA8A6I/DMg==
> Sender: [log in to unmask]
> Content-Length: 718
>
> All,
>       Just out of curiousity, what was the complexity level
> of your last PCB ?  Mine was:
>
> Overall size: 14.437" X 11.0236" (366.7 X 280.0 mm)
> Number of Nets: 2,003
> Number of Holes: 9,888
> Lines / Space:  .005 / .005
> Number of Layers:  12
> Number of components:  1050
> Number of Pins: 9518
> Time to complete:  16 actual working days (not including change / hold time)
>
> I thought this was pretty difficult, but I wanted to hear what everyone
> else was doing out there.
>
> Thanks !
>
> Karl
>
>
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