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January 1997

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Subject:
From:
David Bergman <[log in to unmask]>
Date:
Thu, 16 Jan 1997 12:02:51 -0600 (CST)
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TEXT/PLAIN
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JEDEC concentrates their efforts on the component and the I/O pitch.  IPC 
is responsible for developing the associated land patterns.  We are in 
the process of developing land patterns for BGA as part of IPC-SM-782A.  
You can contact Lisa Williams of IPC's staff to determine the current status.

Regards

__________________________________________________

David W. Bergman, V.P. of Technical Programs
IPC
2215 Sanders Road
Northbrook, IL  60062-6135
847-509-9700 x340 Phone
847-509-9798 Fax
email  [log in to unmask]
www  http://www.ipc.org
faxback support 800-646-0089
---------------------------------------------------


On Tue, 14 Jan 1997, Ian Wylie wrote:

> Hello out there can anybody help me ?
> 
> I am interested in any info on design rule and footprint standards for BGA
> devices.  ?
> 
> 
> Are there any Jedec Standards that cover this.?
> 
> Regards 
>  Ian Wylie
>  Technical Manager
> Ian Wylie
> Technical Systems Manager
> Exacta Circuits Ltd
> Printed Circuit Manufacturers
> Selkirk
> Scotland  TD7 5EJ
> 00 44 1750 21601 Ext 3219
> 
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