Bob-
     
     couldn't readily locate anything on attachment, but had recently read 
     something which described and illustrated 5 types of CSPs, along with 
     a table which compares the 5 styles as offered by the various CSP 
     suppliers. See:
     
     IEEE Circuits and Devices magazine, July 1995 issue, p32-37, "Known 
     good die meets chip size package," by Larry Gilg, figs. 6, 7, and 8, 
     Table on page 35, and descriptions on page 36.
     
     To partially answer your question, the article describes 4 "area 
     array" type CSPs and one peripheral lead type CSP. The area array 
     types are 1)Tape Carrier method (NEC, Hitachi, & Shinko), 2) Ceramic 
     Carrier method (Toshiba, Matsushita), 3) Resin Mold (Mitsubishi), and 
     4) LOC, Lead-on-chip (Fujitsu).
     Tessera is listed as the technology licensee for the Hitachi and the 
     Shinko processes.
     
     The area array CSPs will usually resemble small pitch BGAs or plastic 
     encapsulated flip chips. Chip to CSP area ratios are listed as 50% to 
     90% for Ceramic Carrier methods, and 98% to 100% for all other area 
     array methods.
     
     Hope this begins to answer your querry.
     
     Michael Alderete
     Loral Aeronutronic
     Rancho Santa Margarita, CA -U.S.
     [log in to unmask]


______________________________ Reply Separator _________________________________
Subject: chip-scale attachement
Author:  [log in to unmask] at _internet
Date:    8/10/95 2:52 PM


To whom---
     
I hate to clutter up the "EMPLOYMENT PAGE" with a need/interest of a technical 
nature, but can someone give me an overview (50 words or less) on chip scale 
devices and their attachement to the pwb. I think they are,simplistically,
a coated chip with a ball grid attachement scheme. Further insight would be 
appreciated. Much thanks in advance.
     
                                       Bob [log in to unmask]