Dear Murray and TechNetters,



Unfortunately, I won't have no clue to provide but also share the same kind of understanding concerns with this IPC-2221 6.1 table for PCBA electrical conductor spacings...



Your question was "what category should be used for covered trace to component pad spacing?", mine would be " what category should be used for soldering land spacing?".



For soldering lands, there is usually a solder mask dam between the lands. I know solder mask is not a good insulator, but this is not air either... I don't see it taken into account in the table. This may be intentional but not clarified.



Take a C0603 500V ceramic chip capacitor with standard 5-sided square-end terminations that has typically a gap <0.8mm between terminations, both on the top and bottom (PCB side) sides..

This is not compatible with 6.1 table spacing requirements that should be >1.5mm (A6, no conformal coating) or >0.8mm (A5, with conformal coating) : does this mean a C0603 500V cannot be used, or what?

What spacing requirements would be applicable to the distance between soldering lands (that is part of the C0603 component footprint design)?



Have a nice week-end.



Arnaud Grivon



-----Message d'origine-----

De : TechNet [mailto:[log in to unmask]] De la part de Campbell, Murray

Envoyé : jeudi 22 août 2019 19:05

À : [log in to unmask]

Objet : [TN] Table 6.1 conductor spacing



Hey All,

In regards to conductor spacing,  assuming typical  B4/A6 combination, it is my understanding that adjacent conductors shall be covered to allow B4 spacing requirements.   Does B4 spacing still allow for a covered trace to open pad spacing?  Or does a covered trace to open pad fall into the A6 category?  I guess the short question should have been “what category should be used for covered trace to component pad spacing?”

Thanks,



Murray Campbell



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