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May 2019

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From:
"Stadem, Richard D" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D
Date:
Thu, 9 May 2019 17:33:23 +0000
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Agreed, Dwight. All good points. And request coupons.



-----Original Message-----

From: TechNet <[log in to unmask]> On Behalf Of Dwight Mattix

Sent: Thursday, May 9, 2019 10:40 AM

To: [log in to unmask]

Subject: Re: [TN] Bad Vias - Need help determining the root cause



And maybe pay for basic QC measures this time -- like 100% netlist opens/shorts testing, x-section solder floats and analysis.



-----Original Message-----

From: TechNet <[log in to unmask]> On Behalf Of Yuan-chia Joyce Koo

Sent: Thursday, May 9, 2019 3:39 AM

To: [log in to unmask]

Subject: [EXT] Re: [TN] Bad Vias - Need help determining the root cause



agree.  it could be improper de-smear as well  that  could cause poor wetting.  If I were OP,I'll start looking for alternative board house

- 4 layer capability should not be that hard to find in TX.  IMHO.

jk

On May 9, 2019, at 5:51 AM, Gerry Gagnon wrote:



> Dwight,

>

> Sorry to hijack your response but I had an elderly moment with this 

> keyboard on my phone. 😬😬

>

> My first vote is for poor electroless copper coverage. Could be due to 

> air bubbles as electroless does use air. Could also be that 

> electroless did not “take” due to poor hole clean and pre- electroless 

> hole prep.

>

> No electroless, no electroplating.

>

> Another possibility could be HASL which typically uses HBR as a flux 

> or pre-flux prep before the solder application. A few extra “shots”

> through HASL process in order to meet solder thickness specs could 

> take out thin-to-no copper.

>

> Thanks and Best regards,

>

> Gerry Gagnon

>

>> On May 8, 2019, at 8:39 PM, Dwight Mattix <[log in to unmask]>

>> wrote:

>>

>> <<The manager says "in the pattern

>>    plating tank we have no air.  >>

>>

>> /facepalm/

>>

>> I'd have asked him "Do you even lift, errr...  plate bro?"

>>

>> Dielectric reacts with plating solution and outgasses. So it's not 

>> just a matter of wetting the hole. It's a matter of continuously 

>> egressing the gas out of the hole.

>>

>> -----Original Message-----

>> From: TechNet <[log in to unmask]> On Behalf Of Robert Kondner

>> Sent: Wednesday, May 8, 2019 5:12 PM

>> To: [log in to unmask]

>> Subject: [EXT] Re: [TN] Bad Vias - Need help determining the root 

>> cause

>>

>> Be sure to let us know what you find. Enquiring Minds want to Know.

>>

>> Thanks,

>> Bob K.

>>

>> -----Original Message-----

>> From: TechNet <[log in to unmask]> On Behalf Of Christopher Brand

>> Sent: Wednesday, May 8, 2019 7:45 PM

>> To: [log in to unmask]

>> Subject: Re: [TN] Bad Vias - Need help determining the root cause

>>

>> Hi Richard, Victor, Dennis and All,

>>

>> I greatly appreciate all the help and insight so far on this.

>>

>> The boards don't have any selective or wave soldering, just reflow 

>> and hand soldering for a few thru-hole connectors.  The boards are 

>> HASL. The sample of boards in the photos are mostly 2 sided and one 

>> that is 4 layer.  These are small production runs usually.

>>

>> In talking with the manager of the board shop, he's sending out 

>> samples of their plating tanks to be tested. I've asked him the 

>> following questions from input from you folks:

>>

>>  * Air bubbles in the plating tank? The manager says "in the pattern

>>    plating tank we have no air.  solution was eductors moving the

>>    solution and swishing of the panels during plating".

>>  * Is their plating current is sufficient? The manager says that they

>>    are "plating the top of the cu scale to be sure".  Is there a 

>> method

>>    I can tell them to check if their plating current is good?

>>  * They do have a copy of IPC-9121

>>

>> I am going to look into sending out to get some of the vias 

>> microsectioned to get a better look inside them.

>>

>> Is there anything else I need/should be asking them to check?

>>

>> Thank you kindly,

>>

>> Christopher Brand

>> Ludlum Measurements, Inc.

>> 501 Oak Street

>> Sweetwater, TX 79556 USA

>> (325) 235-5494 Phone, ext:3318

>>

>>> On 5/8/2019 9:07 AM, Stadem, Richard D wrote:

>>> Christopher,

>>> Having a little more time to look at your pictures this morning, I 

>>> noticed several pics such as 006 and 010 that show gross open 

>>> breakout between the via PAD (foil copper) and via BARREL (plated- 

>>> up copper). There is no evidence of selective or wave soldering on 

>>> many of these. The breakout is on the TOP side with no evidence of 

>>> additional solder applied, therefore my only conclusion is that the 

>>> root cause was purely the plating issues from the fabricator.

>>> dean

>>>

>>> -----Original Message-----

>>> From: TechNet <[log in to unmask]> On Behalf Of Dennis Fritz

>>> Sent: Monday, May 6, 2019 2:38 PM

>>> To: [log in to unmask]

>>> Subject: Re: [TN] Bad Vias - Need help determining the root cause

>>>

>>> Do you have a copy of IPC 9121 - troubleshooting guide?  That has a 

>>> large number of pictures of failed via holes, causes, and remedies.

>>>

>>>> On Mon, May 6, 2019 at 3:12 PM Christopher Brand 

>>>> <[log in to unmask]> wrote:

>>>>

>>>> Greetings,

>>>>

>>>> I'm having issues with open vias on a couple of runs of PCBAs and 

>>>> was hoping to get some help on finding a root cause or at least 

>>>> point me in the right direction.  I know that there is lots of 

>>>> knowledge and experience on this forum and I'm hoping someone will 

>>>> say they've seen this before, as my knowledge is rather limited on 

>>>> this.

>>>>

>>>> Here are a few photos of the vias in question.

>>>>

>>>>    https://ludlums.com/software/BadVias/badvia_01.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_02.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_03.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_04.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_05.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_06.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_07.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_08.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_09.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_10.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_11.jpg

>>>>    https://ludlums.com/software/BadVias/badvia_12.jpg

>>>>

>>>> On some, the via barrel has a void in the center and on others the 

>>>> edge of the barrel doesn't connect with the pad, Both issues are 

>>>> causing an open via as you can see in the photos.

>>>>

>>>> I know that the board shop recently changed up their plating tanks 

>>>> (new chemical and power supply).  Could these bad vias be the 

>>>> result of insufficient current in the plating process or some other 

>>>> process?

>>>>

>>>> I'd be much appreciative of any insight this forum could give.

>>>>

>>>> --

>>>> Thank you kindly,

>>>>

>>>> Christopher Brand

>>>> Ludlum Measurements, Inc.

>>>> 501 Oak Street

>>>> Sweetwater, TX 79556 USA

>>>> (325) 235-5494 Phone, ext:3318

>>>>

>>>

>>> --

>>> Denny Fritz

>>> Consultant

>>> 812 584 2687


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