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November 2015

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Yuan-chia Joyce Koo <[log in to unmask]>, TechNet E-Mail Forum <[log in to unmask]>
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Tue, 10 Nov 2015 14:36:21 +0000
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TechNet E-Mail Forum <[log in to unmask]>, "Stadem, Richard D." <[log in to unmask]>
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"Stadem, Richard D." <[log in to unmask]>
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I doubt there would be anything in the JEDEC standards, but I could be wrong. Too many variations of a theme to cover them all.
But I would be sure to expect something on the part drawing.

-----Original Message-----
From: Yuan-chia Joyce Koo [mailto:[log in to unmask]] 
Sent: Monday, November 09, 2015 7:16 PM
To: TechNet E-Mail Forum; Stadem, Richard D.
Subject: Re: [TN] IPC SMT Lead to package co-planarity

check jedec standard for components dwg package.  plus your stencil paste height after reflow.
On Nov 9, 2015, at 2:09 PM, Stadem, Richard D. wrote:

> That would be in the component drawing from the vendor.
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Victor Hernandez
> Sent: Monday, November 09, 2015 12:51 PM
> To: [log in to unmask]
> Subject: [TN] IPC SMT Lead to package co-planarity
>
> Fellow TechNetters:
>
>    In which IPC STD will I find information of distance between the  
> plastic housing standoff and lead height.   INMHO the standoff  
> should rest on the solder mask surface while the lead should have a  
> slight gap to rest on the PWB copper pads.   I hope that this makes  
> sense.   A print/spec is not readily available.
>
> Victor,
>
>
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