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October 2015

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Subject:
From:
Yuan-chia Joyce Koo <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Yuan-chia Joyce Koo <[log in to unmask]>
Date:
Tue, 13 Oct 2015 19:18:11 -0400
Content-Type:
text/plain
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text/plain (56 lines)
Bob, it is designed in.  maximum allowable repair (2 SMT plus reflow  
plus 1 repair plus 1 encapsulation as total thermal history allowable  
for example) defined based on reliability test data (use simulated  
repair - extra reflow for example).  It depend upon where you capture  
the repair, (this is not including field repair).  prior to  
encapsulation for example or conformal coat.... design doc should  
have the details as part of tech transfer (at least in the old days).  
my 2 cents.... field repair is different animal all together...(if it  
is MIL, usually, no field repair due to the redundancy, spare plug  
and play usually is the case).
         jk
On Oct 13, 2015, at 6:57 PM, Bob Wettermann wrote:

> Technetters:
>
> I was visiting with a class III assembler today (MIL/Aero) who was  
> asking
> me about other MIL/AERO customers who allow or do not allow for  
> boards to
> be repaired (IPC 7721 procedures to affect repairs).
>
> As an informal "census" do you Class III assemblers and OEMs ...
>
> A. Allow repairs as a matter of course (or is it a "depends" answer)
>
> B. Allow for pad repairs (If YES under which boundary conditions?)
>
> C. Allow for corner or other laminate repairs (If YES under which  
> boundary
> conditions?)
>
> D. Allow for mask repairs (If YES under which boundary conditions?)
>
> Thanks for comments in advance!
>
> Bob/BEST
> -- 
> Bob Wettermann
> BEST Inc
> [log in to unmask]
> Cell: 847-767-5745
>
>
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