Hi Bob - the IPC-1601 and the NPL paper don't conflict with one another.
The issue is that the baking in the IPC-1601 is intended to remediate
delamination issues that are recoverable. If in the process of pwb
fabrication or if a pwb has been severely exposed to moisture, there is no
recovery as the amount of baking necessary to pull the moisture out of the
interior of the pwb will render the pwb unsolderable. As an assembler, I
can eliminate the moisture that causes delamination issues in terms of the
outer surface layers and have to trust my pwb fabricators for the internal
moisture. If your filled vias contained trapped moisture, no level of
baking can be implemented as a fix.
Dave
Robert Kondner <[log in to unmask]>
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09/21/2012 04:19 PM
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Re: [TN] R: [TN] Bake time for boards with multiple solid copper planes
Gabriele,
Thank you, I did start looking and reading.
Problem is the bake out time for a 10cm square of a laminated with copper
coated top and bottom is something like 2 years. (From the NRL video.)
Seems like copper is impenetrable by water vapor. I would assume water in
absorbed by the laminate during the manufacturing process so it will
exist
between solid copper planes. And filling the vias probably makes it even
worse.
Have not been able to verify any of this yet, it was only through the NPL
link that I came to this conclusion.
If vias are tied to plane using thermal reliefs, and not flooded, then
that
makes a board "Bake-able" as vapor can escape.
Any thoughts from anyone would be appreciated.
Bob K.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of SALA GABRIELE
Sent: Friday, September 21, 2012 3:32 PM
To: [log in to unmask]
Subject: [TN] R: [TN] Bake time for boards with multiple solid copper
planes
Hi Bob,
suggestion, read (and study):
IPC-1601 Printed Board Handling and Storage Guideline
http://www.ipc.org/TOC/IPC-1601.pdf (abstract)
see chapters
3.4 Baking for Moisture Removal
3.4.1 Problems Caused By Baking
3.4.2 Baking Environment
3.4.3 Baking Considerations
3.4.4 Establishing Baking Profiles
Ecc....
Also take a look to Test Method IPC-TM-650 2-6-28 (free download), useful
TM that will help you to better assess what it means moisture entrapped in
laminate and how to remove it totally, or partially according to your
specifications.
Moisture Content and/or Moisture Absorption Rate, (Bulk) Printed Board
http://www.ipc.org/4.0_Knowledge/4.1_Standards/test/2-6_2-6-28.pdf
by experience, in the past, to bake-off PCB from 16 Layers up to 28 L and
more, after about 14-18 months of shelf, even if well packed, we use to
bake
them at 115°C for 16 h, some time 18 h or 24 h, depending of thickness,
size and weight and a general assessment about % of resin content versus
fiber-glass (construction and stake-up +Copper content).
Some time, to protect of OSP finish, we use to blow N2 inside the
ventilated
Oven
Important: no need to remove all the moisture entrapped, but just the
enough
MAMC (Maximum Acceptable Amount Content).
Other suggestion, when staking PCB inside oven, pile them up at a maximum
height of 25 mm ( 1 inch), in such way the vapour flows out easily.
Have a good luck
Gabriele
-----Messaggio originale-----
Da: TechNet [mailto:[log in to unmask]] Per conto di Robert Kondner
Inviato: venerdì 21 settembre 2012 19.04
A: [log in to unmask]
Oggetto: [TN] Bake time for boards with multiple solid copper planes
Hi,
Can anyone point me to a document that describes how moisture can be
driven
out of internal PCB layers if solid copper layers exist above and below
internal layers?
When routing PCB connections to internal layers, say GND for example, you
want to tie together multiple GND plane layers. But unless a thermal
connection is provided I see no way for moisture to escape from internal
layers.
Using thermal vias breaks up GND planes so it is common to flood vias.
Question:
Do flooded vias to multiple layers raise problems with bake out?
Bob K
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