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December 2009

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Subject:
From:
Graham Naisbitt <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Graham Naisbitt <[log in to unmask]>
Date:
Mon, 7 Dec 2009 17:40:30 +0000
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Charming Chan

First off, please download a copy of the IPC-TM-650 method 2.6.3.6 from the IPC web site. This standard was the very last update of the old Telcordia spec and it might serve to answer your question.

I think your assumption is correct - the minimum spacing shall be 0.004 inch.

As to your second question - there may be some confusion on the term "wet solder mask". This should be: as distinct from "dry-film solder mask".

The issue is better addressed by the latest SIR test method that you are recommended to use: 2.6.3.7

The old Telcordia spec is way out of date and was employed for telephone electronics. Much of it's criteria was thrown into doubt by a major research project headed by the British NPL that ultimately resulted in the new 2.6.3.7 method.

Hope this helps...?

Regards

Graham Naisbitt - KBO

Email: [log in to unmask]
Phone: +44 (0)12 5252 1500
Web: www.gen3systems.com

On 7 Dec 2009, at 14:15, Charming Chan wrote:

> Hello All, 
> 
> I'm asking for help to understanding the section R6-176 and R7-13 in spec TELCORDIA GR-78-CORE Issue 2, thanks a lot.
> 
> R6-176 [336] Insulation thickness between adjacent PTHs and conductors shall be a minimum of 0.004 inch(0.0035 inch after accounting for isolated protrusions).  
> 
> Question: Does this section mean that the spacing between PTHs and conductors shall be a minimum of 0.004 inch?
> 
> 
> R7-13 [426] Interconnection and circuit pack design rules shall include an interconductor voltage limit where wet(screen printed) solder masks are used. Above this voltage, dry film or demonstrated equivalent photoimageable wet solder mask shall be used; conformal coatings are a viable alternative.
> 
> Question: What's the specific voltage limit shall set up for wet solder mask?
> 
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