Bill's problem is (has been) rather common. Calling his case BP is dangerous due to precedence, semantics, and the lack of analytical evidence.
The combination of 6012/4552/J-STD-003 have the controls in place to mitigate. 6012 (albeit implicitly) invokes 4552, which requires XRF and durability coating rating of 3. Rating 3 uses 8 hours of 72/85 T/H conditioning which in combination with standardly activated flux #2 and SAC305 as the solder pot alloy is very good at finding these lurking problems. 003 and 4552 are supposed to be dialing-in the collimator vs. feature size issue. 6012C will not require these controls for ENEPIG, as the addition Palladium is considered to reduce the risk to "coverage and solderable (rating 2)" control levels. IMO very cool.
Bill, there very likely is no fix for these boards. Play the 6012/4552 conformance/acceptability card. Good luck.
Chris
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Stadem, Richard D.
Sent: Wednesday, October 21, 2009 8:38 AM
To: [log in to unmask]
Subject: Re: [TN] ENIG Issue
ENIG is defined in IPC-4552, in Table 3-1 "Requirements of Electroless Nickel Immersion Gold Plating". Electroless nickel thickness is 3 to 6 uM [118.1 to 236.2 uINCHES]. The Immersion Gold Thickness is .05 uM
[1.97 uINCHES] MINIMUM. The standard goes on to say that the typical gold thickness will be 3 to 5 uINCHES.
If a board vendor goes below 50 uINCHES, it is NOT ENIG as specified per the IPC.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Victor Hernandez
Sent: Wednesday, October 21, 2009 6:01 AM
To: [log in to unmask]
Subject: Re: [TN] ENIG Issue
Where are the recommended thickness values for Au/Ni on ENIG processes?
Some vendors go below 50 micro inches in the nickel.
Victor,
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Rex Waygood
Sent: Wednesday, October 21, 2009 3:35 AM
To: [log in to unmask]
Subject: Re: [TN] ENIG Issue
Dear Bill
These are the causes that I have seen for the problem you describe.
Porous/thin gold permitting passivation of the Ni which the first reflow makes much worse.
Thin Ni causing copper to migrate through and produce a non-solderable surface under the gold, again the first reflow accelerates this.
I have also seen passivated Ni under gold but that just makes all the components fall off in shear test or shock test, so it is reasonably apparent.
I went through a period of wanting ENIG to disappear off the face of the earth. However over the years the process window for ENIG seems to have improved and our problems diminished.
Perhaps I should not have said that.........................
Rex
Rex Waygood
Technical Manager
Hansatech EMS provides value manufacturing through engineering and quality
Hansatech EMS Limited
Benson Road
Nuffield Industrial Estate
Poole
01202 338200
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of [log in to unmask]
Sent: 21 October 2009 00:21
To: [log in to unmask]
Subject: [TN] ENIG Issue
Fellow TechNetters: I ran into a problem and I am looking for more information. We had some PCB made with ENIG for SMT applications. We populated the backside, ran them through the convection oven, the solder fillets were fine. Populated the first five (5) PCBs on the topside, ran them through the convection oven, and the solder fillets were quite bad, actually dewetted. Could not even be touched up. Tried two (2) more random PCBs and got the same results. Never have run into this before but have been told it is NOT a unique problem. Has anybody had this happen? Have to tell our customer that they are not going to be getting their PCBs on time and would rather not look like the north end of a southbound mule.
Thanks in advance for your assistance.
Bill Black
1 631 667 9699 X13
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