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February 2009

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Subject:
From:
Ken Bloomquist <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Ken Bloomquist <[log in to unmask]>
Date:
Fri, 13 Feb 2009 14:23:20 -0800
Content-Type:
text/plain
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text/plain (84 lines)
You can use the guidelines of IPC 610 but quite often it's up to the
engineering drawing to define the keep-out areas. Our rule of thumb is to
coat the whole board unless otherwise specified.

KennyB


-----Original Message-----
From: Whittaker, Dewey (EHCOE) [mailto:[log in to unmask]] 
Sent: Friday, February 13, 2009 1:47 PM
To: [log in to unmask]
Subject: Re: [TN] IPC-CC-830

Not per IPC-CC-830 or IPC-HDBK-830, but quite often there will be keep-out
areas along the edges for card guides and/or thermal and electrical contact.
Dewey

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Jean-François
Bissonnette
Sent: Friday, February 13, 2009 2:39 PM
To: [log in to unmask]
Subject: [TN] IPC-CC-830

Hi Technetters,

 

Can anyone tell me if there is a spec on the coverage of conformal coating,
more precisely is there a required clearance on the edges of the PCBs?

 

Jean-François Bissonnette

Technologue - Documentation de procédés

t : 450-967-7100 ext : 242

Mtl : 514-990-5762

f : 450-967-7444

 


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847-615-7100 ext.2815
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