TECHNET Archives

November 2006

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
"Stadem, Richard D." <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D.
Date:
Sat, 11 Nov 2006 07:48:19 -0600
Content-Type:
text/plain
Parts/Attachments:
text/plain (70 lines)
I assume the heatsink must make contact with the pwb to perform
properly? It sounds like you did not want the heatsink. If the
heatsinking is not needed in your particular application, you can put a
.010" thick FR-4 spacer under the component temporarily until it is
soldered in place, then remove it to comply with the print. If
heatsinking is required, then you will need an ECN to add a thermally
conductive/electrically insulative adhesive pad under the part to allow
the heat transfer, but prevent the electrical short. Bergquist sells
these in various sizes, and in sheets that can be cut to make your own.
Many companies make them. They are called Sil-Pad, Gel-pad, etc. They
can be ordered as thin as .005".

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Kerry McMullen
Sent: Friday, November 10, 2006 3:11 PM
To: [log in to unmask]
Subject: [TN] Power Via Capping

Hello Esteemed Technet,

Ran into a little issue here.  A board we have has 4 power via's (3.3,
5,
etc) directly under a device that was not supposed to have an grounded
exposed heatsink on the bottom side.  The nasty result is the occasional
short where one of the power vias make contact to the heatsink.  I
cannot drill out these vias as there is trace going from these vias
directly to the pins of the device.

I can use kapton tape to cover the vias, but I was looking for a better
solution.
No soldermasking allowed!

Any ideas?
Thanks in advance,
Kerry



Kerry McMullen
Principal New Product Mfg. Engineer
LTX Corporation
825 University Avenue
Norwood, MA 02062-2643
(T) 781-467-5468
(C) 508-631-1832

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 1.8e To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to [log in to unmask]: SET
Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the
posts: send e-mail to [log in to unmask]: SET Technet Digest Search the
archives of previous posts at: http://listserv.ipc.org/archives Please
visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for
additional information, or contact Keach Sasamori at [log in to unmask] or
847-615-7100 ext.2815
-----------------------------------------------------
(F) 781-461-0993

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 1.8e
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815
-----------------------------------------------------

ATOM RSS1 RSS2