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October 2004

DesignerCouncil@IPC.ORG

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Subject:
From:
"Brooks,Bill" <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Sat, 16 Oct 2004 15:28:16 -0700
Content-Type:
text/plain
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text/plain (180 lines)
Hi Bob,

If you haven't visited the IPC DC website lately, there is a special
discount offer to Designers that are members for the IPC specs and DC
materials of interest to us as designers...

http://www.ipcdesignerscouncil.org/DCmembership/profmem.htm
<http://www.ipcdesignerscouncil.org/DCmembership/profmem.htm>

Once the page opens, click on 'design-related standards' and it will open a
PDF style form you can fill out to order your specs at a discount...

Best regards,


Bill Brooks - KG6VVP
PCB Design Engineer , C.I.D., C.I.I.
Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510
http://www.dtwc.com
http://pcbwizards.com


-----Original Message-----
From: Harter, Robert [mailto:[log in to unmask]]
Sent: Friday, October 15, 2004 8:02 AM
To: (Designers Council Forum); Brooks,Bill
Subject: RE: [DC] IPC Flatness and Callout of Standards to Use in Fab Note
s.

Bill,

Thanks, that is exactly what I was looking for.  I knew there was an IPC
spec but without direct access to their standards I was hard pressed to
find the information.  Hopefully one of these days my employer will see
the advantages of joining far out weigh the cost.

Bob Harter, Jr.
PCB Designer
Paratek Microwave, Inc.
6935 G Oakland Mills Rd.
Columbia, MD 21045
PH# (443)259-0140 x278
CP# (443)739-8407
WWW.PARATEK.COM

-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of
Brooks,Bill
Sent: Thursday, October 14, 2004 22:30
To: [log in to unmask]
Subject: Re: [DC] IPC Flatness and Callout of Standards to Use in Fab
Note s.

Hi Robert,

This is the note I use to cover board flatness and bow and twist for
surface
mount components on glass/epoxy laminate multilayer boards.


BOW AND TWIST SHALL NOT EXCEED 0.75% (.00075 IN PER IN) IN ACCORDANCE
WITH
IPC-A-600F FOR SURFACE MOUNTED BOARDS WHEN MEASURED USING IPC-TM-650,
METHOD
2.4.22.


I hope that helps...

Best regards,

Bill Brooks - KG6VVP
PCB Design Engineer , C.I.D., C.I.I.
Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510
http://www.dtwc.com
http://pcbwizards.com


-----Original Message-----
From: Harter, Robert [mailto:[log in to unmask]]
Sent: Thursday, October 14, 2004 4:05 PM
To: [log in to unmask]
Subject: [DC] IPC Flatness and Callout of Standards to Use in Fab Notes.

Hi All,



I am writing to ask what is the IPC tolerance for how flat a PCB must be
and what callout should I use in my Fab Notes?  This PCB is going to be
part of an RF Filter module that will be SMD.  I made an inquiry a few
weeks ago about best practices to employ for designing a flat board that
has a 25mil 6010 top core and 2 FR-4 cores for control routing.
Thank-you all again for the great timely advice on that question, now
I'm just trying to make sure the Fab house and I are on the same page.





Bob Harter, Jr.

PCB Designer

Paratek Microwave, Inc.

6935 G Oakland Mills Rd.

Columbia, MD 21045

PH# (443)259-0140 x278

CP# (443)739-8407

WWW.PARATEK.COM <http://www.paratek.com/>




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information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100
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