Thank's a lot!
-----Original Message-----
From: Brooks,Bill [mailto:[log in to unmask]]
Sent: Thursday, October 28, 2004 2:01 PM
To: [log in to unmask]
Subject: Re: [DC] Recommended oversize and tol. reg.
Hi Fred,
Sorry I didn't get back to you sooner, I have been busy lately...
While the IPC does not have specific requirements for solder mask tolerances
for any given pad to trace situation, (Ref IPC-2221 section 4.5.1 Solder
Resist (Solder Mask) Coatings)...from a 'Designer's point of view' (as you
have asked for that qualification before) the solder mask needs to be
compliant with IPC-SM-840 and sized just enough to allow proper soldering
without breakdown of the polymer material's adhesion... and at the same time
to protect the surface of the non-soldered conductors from exposure to
moisture or contaminates or solder that could compromise the performance of
the board or provide a path for dendritic growth between conductors.
That being said... Most designers, including myself, contact the shop that
will manufacture their boards and find out what their standard process
allowances are to analyze the need for any special solder mask clearance
adjustments or tolerance issues that they may need to specify to accomplish
that goal. These factors change from shop to shop and should be considered
in your design.
For most boards, especially ones without special physical, electrical or
environmental conditions to meet, the designer will supply the board
manufacturer with a 1:1 pad image for the solder mask and ask that the
manufacturer swell the pads as necessary to maintain a 0 to 4 mil clearance
(0.00mm to 0.08mm) over the size of the pad as the manufacturer knows their
equipment capabilities and tolerances and can make adjustments
accordingly.... Obviously any solder mask that covers the component land
area is unacceptable and any exposed conductor that is not to have solder on
it must not be unprotected by the solder mask.
Your question indicates that there is a 5 mil (0.127mm) nominal distance
between a pad that needs solder and a trace that you want to protect from
solder. That means with the manufacturer's tolerances there will be less
than 5 mils between them in the worst case condition... That would be a
situation where the board is under etched and the conductor and pad are at
their maximum material condition.
So let us say your vendor has a .0001 under etch condition which is about
20% of the line width then the trace and pad would now have a spacing of
.0049 which would be the maximum that the solder mask width could be between
them... Next the positional tolerance of the image that the LPI is exposed
with is dependant upon the tooling accuracy... I don't have that tolerance
available to me but I know that the image itself can grow and shrink by as
much as .002 just because of the temperature and humidity of the photo
materials and imaging process... probably somewhere between +/-.001 and +/-
.002. Also there are 'fringing effects' that occur when the light passed
through the film and passes into the LPI exposing it that can grow the image
a little... Another thing to think about is the size of the panel... The
tolerances are much harder to control over a larger area... so smaller
boards would not have as much trouble as a large multiboard assembly panel.
So worst case, you could effectively end up with much less than 3 mils of
coverage between the pad and the conductor... possibly even exposing the
conductor to the soldering process. It's always good to allow enough spacing
to maintain an overlap of the conductor to help the solder mask to adhere to
the fiberglass/epoxy material.
The vendors I use typically take the 1:1 pad image and make whatever
adjustments and/or compensations they need to match the solder mask openings
with the pads and still cover the conductors... So you might want to set
your CAD DRC rules up to detect PAD to trace spacing that highlights the 5
mil spacings and see if you can increase that spacing if at all possible...
because those are more than likely to be the areas where solder mask may
expose the adjacent conductor under worst case conditions.
I also recommend that you submit your design to the manufacturer and ask for
them to do a review of the solder mask and check for potential issues
between pads and traces... this will also give you more confidence that your
board will be made successfully. I wish I had a patented answer for your
particular situation... but then that's why they call it a 'design',
right...?
Best of luck with your design...
Bill Brooks - KG6VVP
PCB Design Engineer , C.I.D.+, C.I.I.
Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510
http://www.dtwc.com
http://pcbwizards.com
-----Original Message-----
From: Fred Dark [mailto:[log in to unmask]]
Sent: Thursday, October 28, 2004 6:34 AM
To: (Designers Council Forum); Brooks,Bill
Subject: Recommended oversize and tol. reg.
Dear DesignerCouncil; I would like to know on a design with 5mil spacing
what is the recommended oversize and tol. registration for soldermask with
5mil spacing... Pad to trace, etc. We are about to place a big order on a
board with a 5mil spacing, but we want to make sure we are within "DFM"
spec's... Please respond A.S.A.P... Thank you...
Regard's, Fred Dark Jr.
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