The Silicon Valley Chapter of the IPC Designers Council
Next meeting will take place on Tuesday November 9, 2004

Location:
Mentor Graphics
San Jose (1001 Ridder Park Drive).
Time: 11:30AM - 1:30PM
$1 for members; $5 for non-members
RSVP required > send to [log in to unmask]

Topic: "Via In Pad - A New Approach"
by Donald A. Carron

Items covered
1 - Reasons for implementing Pad on via
2 - The new approach to successfully implement this at the fabrication
3 - The old side effects and new process such as blow hole, via cracking etc
4 - Are the any issues during assembly, or design considerations?

About the Speaker:
Donald A. Carron
Director of Technology
TTM Technologies, Inc.
Santa Ana Division

Entered the world of PWB manufacturing in January 1983, and had the opportunity to
work in all aspects of production from front-end planning through final inspection.
Became a Director of Quality Assurance in the mid eighties, and developed an outline
for quality engineering functions in both mechanical and wet processing areas of
manufacturing. Worked in process development in the mid nineties through the present,
with an emphasis on emerging technologies to facilitate high-density routing in modern
printed circuit design. Worked with the first company (in Japan) to develop fully
copper-plated microvia geometries, which was the forerunner to current plating
technologies utilized in advanced facilities today (such as TTM Santa Ana,
who employs the most advanced microvia plating process currently available).
I am currently Director of Technology at TTM Technologies' Santa Ana Division,
and am responsible for both product development and process engineering staff.

University of Vermont-Mathematics
National University-Business
ASQ CQE Training
Member of IPC Designer's Council-San Diego Chapter

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Please RSVP to [log in to unmask]
http://dcchapters.ipc.org/svc/





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