Joe,
I think I have written on this topic before, and more extensive info is
available in the Technet Archives, but I will try to summarize.
Most of the SIR test methods and test boards, at least for IPC, are used
for materials qualification purposes. With the test board and processing
held relatively equal, how does Material A compare to B compare to C, etc.
The bare boards are cheap, the processing easy, and there are set pass-fail
criteria, so no one has to think.
SIR testing of assembly processes is a MUCH more difficult because the
number of factors goes up exponentially: kind of laminate, solder mask
materials and processing, plating material and processing, etc. The boards
are more expensive because they are more complex, the processing more
difficult because it has to approximate your standard processes, and the
absolute horror of it all is that you have to use engineering judgement to
evaluate the results.
The IPC-B-36 board has 4 LCCs which can examine close standoff issues.
What I would recommend is a board that I designed about 5 years ago when I
was at CSL, called the Umpire board. Somewhere in my cluttered hard drive
I have the Gerber files for the board as well as a PDF that has a
description of the board. It is more representative than most IPC boards,
though it has some flaws. I know that some of the participants in this
forum have used this board before.
I am currently working with Graham Naisbitt, Concoat, on a process
qualification vehicle and test method to do what you need. Graham is
co-ordinating with the IEC and both of us are working through the IPC.
Might be later this summer before the first boards are available.
Jack Crawford, IPC, has also gathered together some of my papers and
replies on the topic of cleaning and cleanliness and has them here:
http://files.ipc.org/cleaning_papers.zip
Doug Pauls
"Macko, Joe @
IEC" <joe.macko To: [log in to unmask]
Sent by: TechNet cc:
<[log in to unmask]> Subject: [TN] Surface Insulation Resistance (SIR) testing of populated boards
06/10/2004 02:35
PM
Please respond to
"TechNet E-Mail
Forum."; Please
respond to
"Macko, Joe @
IEC"
Good Afternoon,
We are generating a test plan to evaluate the selection of a new saponifier
for our WESTEK in-line cleaner. We have been looking at running a SIR test
but most literature I read discusses running this test on bare boards and
not populated boards. Is there a reason for this? Would someone please
comment on the value of running this test on populated boards vs. bare
boards? thanks
joe
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