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Fri, 20 Feb 2004 14:04:40 -0500 |
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Applied CAD Knowledge Inc |
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Robert Sefton wrote:
>
> snip <
> But some of the other reasons listed here also
> seem plausible.
Hi Robert,
In fact many are saying the same thing you postulate in
varying degrees of clarity.
Primary factors as I understand things are the fab plate
and etch process control as well as (I think it was Bell-
core) minimizing unncessary copper removal. Have seen
thieving added on inner layers in an effort to help bow
and twist and have heard the assembly "uniform heating"
before, although it strikes me that was in the early days
of reflow.
The wave-solder comment is the same word used in different
context. For some closely-spaced parts (ie 050 pitch SOIC
and perhaps 2mm through-hole connectors) adding a sacrifi-
cial pad is used as a pre-emptive measure expecting the
last two pads drawn out of the solder to bridge.
Usually the electrical impacts of note regards proximity
to same-layer traces, presence of traces on a layer adja-
cent to theiving, and reduction of regulatory spacings
not obvious to a fabricator.
--
Jeff Seeger Applied CAD Knowledge Inc
Chief Technical Officer Tyngsboro, MA 01879
jseeger "at" appliedcad "dot" com 978 649 9800
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