Terry,
you have to find out what is the root cause of the open:
e.g. Drill smear or plating via thickness variation, etc.etc.
you may also experiences thermal expension abnormalty due to PWB stack
problem...etc.etc.
Based on your post, I don't believe your thermal stress simulated the
assembly condition (reflow or wave) extremes.  Cross section of the problem
PWB area should help you a lot (start with X-ray if you have one).
my 1.3 cents.  Good luck.
                                                    jk

>-----Original Message-----
>From: TechNet [mailto:[log in to unmask]]On Behalf Of Terry Exell
>Sent: Tuesday, July 16, 2002 2:46 AM
>To: [log in to unmask]
>Subject: [TN] Stress screening of multi layer production boards for
>optimum reliability
>
>
>Dear All,
>
>I am experiencing occasional open circuits on 16 layer boards
>during assembly and
>during in-service use.  I have started thermal stressing all
>production boards with
>the aim of screening out any boards with latent defects and this
>is identifying and
>removing some problem boards.  However, an equal number of problem
>boards still
>fail during assembly.
>
>Does anyone use similar thermal stressing of production boards to
>help improve
>assembly yields and product reliability?  If so, do you find it successful?
>
>My thermal stressing uses the following parameters:
>10 cycles of hot / cold exposure in a HALT chamber,
>-60 deg C to +120 deg C temperature excursions,
>40 deg C per minute temperature ramp rate.
>The boards are electrically tested after thermal stressing.
>
>I calculate the screening is using approximately 20% of the
>expected life of the
>assembled boards, so I am reluctant to increase the stress levels.
>
>My board manufacturer has made several process improvements over
>the last year but
>I have not seen a significant improvement in my assembly yield.
>
>Best regards
>
>Terry Exell
>PCB Assembly Engineer
>BAE SYSTEMS
>Plymouth, UK
>
>
>
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