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Date: | Thu, 23 May 2002 13:00:09 -0400 |
Content-Type: | text/plain |
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> Denis Lefebvre wrote:
>
> snip <
> I have a case now where an EE is asking for a copper fill on BGA
> ground pins. Since this is not easy to describe in a way that every
> one can understand, I am including a small JPG to illustrate. It is a
> 356 pin BGA, 1mm pitch, 0.5mm solder lands.
Since attachments don't get distributed, let me try to
make a guess that your EE wants a "puddle" of ground in
an area of the array, not the whole part.
>
> I am convinced that this will not fare well when they try to solder
> this part, yet the engineer insists on doing it this way. What
> argument can I make, with supporting data, to persuade him?
If my assumptions are close to correct, what you wind up
with is part of the array with copper defined lands and
part of the array with soldermask defined lands. This
will probably lead a manufacturer to need to make a sten-
cil with two different size openings, after they discover
they have a problem.
You may be able to anticipate by reducing the soldermask
pad size to match the copper pad size on affected balls,
or if your CAD package won't allow this then show the EE
the % difference in land area.
HTH,
--
Jeff Seeger Applied CAD Knowledge Inc
Chief Technical Officer Tyngsboro, MA 01879
jseeger "at" appliedcad "dot" com 978 649 9800
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