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February 2001

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From:
"Furrow, Robert Gordon (Bob)" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Mon, 12 Feb 2001 15:16:56 -0500
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Danny,

As far as question 1, if you can have the bottomside surface mount placed
away from the through hole components, you can buy a selective solder pallet
that would only allow the through hole components to be exposed to the wave
and therefore you would not need to glue the surface mount components. You
would need adequate clearances to allow for the pallet cut-outs.

Question 2 is one near and dear to my heart. I am assuming you mean a via in
the surface mount pad that goes all the way to the other side of the board,
not an one layer microvia. We have been doing "via in pad" (VIP) for quite
some time. It requires careful sizing of the stencil apertures to prevent
insufficients when the hole is at its maximum size, yet allow no excessive
solder when the hole is at the minimum (plugged). In some cases it forces
use of step-down stencils and could therefore preclude the use of metal
squeegee blades. I assume that the reason for the VIP is to allow test
assess on the bottomside. If you do not clean after surface mount, the flux
from the paste can flow to the bottom surface and cause test problems. Even
if you do clean after SM; if you then wave the board, additional residues
may be released from the via during that process. This again causes ICT
nightmares. We have tried to "optimize" our paste, ICT probes, ICT fixtures,
etc. in order to minimize the test issue. It has been my experience once the
assembler resolves one set of issues, the designers utilize VIP technology
on new features that require additional process engineering development. For
instance shared vias on the top and bottomside, or VIP's on very small
feature such as 0603 pads, so that compensating with a larger stencil
becomes problematic. All the issues with VIP are compounded when thicker
substrates (> 0.062") are used. In the end VIP is a designers friend and an
assemblers nightmare. If you can control it such that only certain large
features on 0.062" or less thick boards use VIP's, then it is tolerable.
Otherwise the added effort (engineering, test, inspection) makes it better
to avoid. I feel it is best not to start down this slippery slope. I would
much rather see microvias that only go down one layer be used in place of
VIP. The designer can get his added functionality and the assembler should
not see issues. Of course you need a PWB supplier capable of reliably
providing this for you. If you would like to discuss further, please contact
me.

Thanks,
Robert Furrow
New Product Engineering
Lucent Technologies
978-960-3224    [log in to unmask]

> -----Original Message-----
> From: Danny Harkins [SMTP:[log in to unmask]]
> Sent: Monday, February 12, 2001 2:29 PM
> To:   [log in to unmask]
> Subject:      [TN] SMT Wavesolder & via in a pad
>
> Hello All,
>
> I am needing information (help) on two issues:
>
>      1. We have a board that has all SMT/Thruhole parts on the
> primary side. We would like to add some SMT parts to the secondary
> side, i.e. 0805's, SO8's and SO16's. How could we go about doing
> this and still run thru the wavesolder? We do not have a glue
> dispenser.
>
>      2. We have had some designers ask about putting via's in an
> SMT land. What is the consensus on this?
>
> I appreciate any help, advice you may have.
> Thanks,
>
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