TECHNET Archives

1995

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Condense Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Received:
by ipchq.com (Smail3.1.28.1 #2) id m0t5hG9-0000HTC; Wed, 18 Oct 95 17:46 CDT
Old-Return-Path:
<[log in to unmask]> <miso!vnet.IBM.COM!kkovalovsky>
Date:
Wed, 18 Oct 95 18:29:11 EDT
Precedence:
list
X-Loop:
Resent-Sender:
X-Status:
Status:
O
X-Mailing-List:
<[log in to unmask]> archive/latest/1415
From [log in to unmask] Sat Apr 27 15:
07:06 1996
TO:
Return-Path:
Resent-Message-ID:
<"Zqgc51.0.s38.FEOXm"@ipc>
Subject:
From:
Resent-From:
Message-Id:
Parts/Attachments:
text/plain (17 lines)
From: Kelly Kovalovsky, PCB Quality Engineering                                
~     EMail:[log in to unmask]                                           
Subject: PCB vs. Paste Stencil Comp                                            
We have a fairly large circuit board that we are assembling. The card          
has fine pitch SMT at extreme ends. We have noticed a mismatch between         
the solder paste stencil and the printed circuit board. The circuit            
board features are actually closer together than the stencil.                  
                                                                               
My question to any card assembly site is whether it is common practice         
to compensate a solder paste stencil for shrinkage of a PCB?                   
                                                                               
IBM Microelectronics Division                                                  
6800 IBM Drive MG12/251                                                        
Charlotte, NC  28262-8563                                                      



ATOM RSS1 RSS2