 
| Received: |
by ipc.org (Smail3.1.28.1 #2)
id m0tl29v-0000ZPC; Fri, 9 Feb 96 17:23 CST |
| Encoding: |
31 TEXT |
| Old-Return-Path: |
|
| Date: |
Fri, 09 Feb 96 16:25:00 MST |
| Precedence: |
list |
| Resent-From: |
|
| Resent-Sender: |
|
| X-Status: |
|
| Status: |
O |
| X-Mailing-List: |
|
| TO: |
|
| Return-Path: |
|
| Resent-Message-ID: |
<"8xC7F.0.Az2.aTz6n"@ipc> |
| Subject: |
|
| From: |
|
| X-Loop: |
|
| From [log in to unmask] Tue Feb 13 11: |
12:41 1996 |
| X-Mailer: |
Microsoft Mail V3.0 |
| Message-Id: |
|
| Parts/Attachments: |
|
|
I have a 14-layer SMT digital, polyimide, impedance controlled board per
IPC-D-275,Class3.
The coupon requires a section D. What really is the difference between
Option 1 and Option 2
and how does the conductor routing for all of the layers work out in this
section.
o--------------o o o o o o o o
/
/
o--- o o o o o o o
o--- o o o o o o o
\
\
o-------------o o o o o o o o
The above is my best attempt at drawing a Section D, that I think I need.
My question is
about the routing between these vias....."so that the interconnects in a
specific hole are
separated to the greatest extent possible." (IPC-D-275 page 82 7.3.7.2
Option 2 third para-
graph)
Thanks ahead of time,
DaveS
|
|
|
