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TechNet E-Mail Forum <[log in to unmask]>, GRIVON Arnaud <[log in to unmask]>
Date:
Thu, 9 Aug 2018 08:31:10 -0300
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TechNet E-Mail Forum <[log in to unmask]>, Graham Collins <[log in to unmask]>
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Graham Collins <[log in to unmask]>
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Thanks Arnaud!  It is great to understand what the concern is.

Graham Collins
Senior Process Engineer
Sunsel Systems
(902) 444-7867

On 8/9/2018 4:22 AM, GRIVON Arnaud wrote:
> Hello,
>
> About the "Why protect an IC from UV?" asked by Dave and others, good information can be found in the AN0878 application note from Silicon Labs : https://www.silabs.com/documents/public/application-notes/AN0878.pdf
>
> This might fit with the considered case as, like Joyce guessed first, I think the component of interest should use a WLP package, i.e. a non-molded unprotected die (referred to as CSP in the Silicon Labs application note).
>
> The referenced AN can be summarized as follows :
> - Exposure to light can result in increased leakage currents for CMOS IC that are not fully encapsulated.
> - These increased leakage currents typically do not affect digital IC, but can impact low-energy microcontrollers or precision analog IC.
> - Recommended prevention techniques are the use of a light-blocking enclosure or Glob Top.
> - The WLP backside coating or the use of a board-level underfill are not opaque enough and do not fully encapsulate the package, thus they are  not effective solutions.
>
> Best regards,
>
> AG

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