Received: |
by ipc.org (Smail3.1.28.1 #2)
id m0uPBzS-00008RC; Thu, 30 May 96 12:58 CDT |
Encoding: |
34 TEXT |
Old-Return-Path: |
|
Date: |
Thu, 30 May 96 11:03:00 PDT |
Precedence: |
list |
Resent-From: |
|
Message-ID: |
|
X-Status: |
|
Status: |
O |
X-Mailing-List: |
|
TO: |
|
Return-Path: |
<TechNet-request> |
X-Loop: |
|
Resent-Message-ID: |
<"cymIz1.0.Vz7.47Uhn"@ipc> |
Subject: |
|
From: |
|
From [log in to unmask] Wed Jun 5 16: |
08:24 1996 |
Cc: |
|
X-Mailer: |
Microsoft Mail V3.0 |
Resent-Sender: |
|
Parts/Attachments: |
|
|
----------
From: owner-pcadusers
To: technet
Cc: pcadusers
Subject: DES:ISOLATION
Date: Thursday, May 30, 1996 9:32AM
I'm not sure if this is the best place to ask electronics engineering
type questions; so if anyone knows of an engineering-related forum,
please let me know...
I am in the process of designing a power board to military specs, and
one of the requirements is "2500V isolation between primary and
secondary". Using the formula that says 0.12 mils/volt, I am looking
at a 300mil clearance wherever appropriate, right?
One of the components in the design is an opto-isolator in a DIP8
package, and the data sheet guarantees 3000V insulation between
primary and secondary. Since it is packaged in a DIP, and I am
required to use 65 mil pads, I am only left with 235 mils between
primary and secondary, which works out to (235/0.12) 1958.3 volts.
Am I misinterpreting the requirements?
<cut>
I would definitely check the charts again. I just completed laying out a
board that had 3500v isolation. I only needed 200 mils clearance. PCB and
engineer are doing just fine. Note: the characteristics of the circuit may
have been different though.
Scott
also at [log in to unmask]
|
|
|