Hello all. We recently received some boards with some of the chip resistors
placed with their resistive elements towards the board. J-STD-001B and C view
this as violation for both Class 2 and Class 3. However when you compare this
with IPC-A-610C it is only a process indicator for Classes 2 and 3. The
relevant sections are
J-STD-001C
6.4.2.2 Devices with External Deposited Elements
IPC-A-610C
12.3.2 Chip Components - Termination Variations - Deposited Electrical Elements
- Mounting Upside Down.
So.....who is correct? Does it matter?
Alex Krstic
NovAtel Inc.