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January 2001

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From:
Alex Krstic <[log in to unmask]>
Date:
Thu, 25 Jan 2001 14:12:37 -0700
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"TechNet E-Mail Forum." <[log in to unmask]>, Alex Krstic <[log in to unmask]>
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Hello all.  We recently received some boards with some of the chip resistors
placed with their resistive elements towards the board.  J-STD-001B and C view
this as violation for both Class 2 and Class 3.  However when you compare this
with IPC-A-610C it is only a process indicator for Classes 2 and 3.  The
relevant sections are

J-STD-001C

6.4.2.2 Devices with External Deposited Elements

IPC-A-610C

12.3.2 Chip Components - Termination Variations - Deposited Electrical Elements
- Mounting Upside Down.

So.....who is correct?  Does it matter?

Alex Krstic

NovAtel Inc.




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