Hi Mark!
Here's another *.PDF from Kemet that is pretty good:
http://www.kemet.com/KEMET/web/homepage/kechome.nsf/vapub
files/f2106/$file/f2106.pdf
I know it's a long filename, but type it in without any spaces...it talks
about MLC capacitor flex cracking...what happens with depanelizing.
One thing I must say though, a third, a third, and a third is pretty generic
when specifying scores. Yeah, that works a lot of the time, but it can burn
you more times than you would like...score depth really depends on laminate
lay-up, how the glass fibers are oriented to each other within each layer,
etc.
Also, one needs to verify that what you asked for is actually done. I've
ordered fabs from a shop that specified a score (the general 1/3, 1/3, and a
1/3) and found out after we populated the assemblies, the score was 1/3 on
one side, but barely kissed the surface on the other. So there I was with an
exacto-knife going back over the scores so I could singulate the boards
without fracturing parts...not fun. Luckily, this wasn't a high volume board.
-Steve Gregory-
>
>
> Hi Mark, this is almost the same problem that we had with an 1812
> multilayer
> ceramic chip capacitor. For some guidance I give up the following URLs.
> Gotta
> like that John Maxwell fella.
>
> http://www.avxcorp.com/docs/techinfo/cracks.pdf
>
> http://www.avxcorp.com/docs/techinfo/paramimp.pdf
>
> http://www.avxcorp.com/docs/techinfo/assembly.pdf
>
> http://www.avxcorp.com/docs/techinfo/smzero.pdf
>
>
>
>
>
>
> http://www.kemet.com/KEMET/web/homepage/kechome.nsf/vapubfiles/f2111/$file/f2111
> .pdf
>
>
>
> Helped us, hope it helps others.
>
> Regards,
>
> Alex Krstic
> NovAtel Inc.
> Quality Engineering Services
>
>
> -----Original Message-----
> From: Mark E. Schumacher [mailto:[log in to unmask]]
> Sent: Monday, April 15, 2002 2:57 PM
> To: [log in to unmask]
> Subject: [TN] Depanelization - Cracked Chip Caps
>
> TechNet,
> Does anyone out there have any good depanelization references or
> guidelines?
> Has anyone ever encountered similar problems with PCB depanelization per
> below?
>
> Problem -
> We have encountered 1210 size chip capacitors failing, located near PCB
> score edge, after depanelization with CAB Maestro 4M (automatic Pizza
> cutter). Sectioned parts show classic flex cracks. PCBs are prescored with
> 30 deg and 1/3 web. The PCB edge has irregular shapes, therefore some
> sections of the score line are routed. In addition, on advice from others,
> we have added additional routes around the sensitive 1210 parts which were
> cracking. As a consequence of these routes, we have made things worse, we
> are now cracking 0805 parts (located at the end of the route) which never
> were damaged before. The depanelizing cutter wheel impacts the PCB each
> time it moves across a route and makes contact with the PCB. These added
> routes just increased the number of impacts the PCB gets during
> depanelization.
>
> Questions -
> 1) Should routes around parts that are close to the score line be added
> along the score line? Would I be better off getting rid of all routes in
> the score line to eliminate cutter wheel impacts during depanelization? We
> have noticed that we have no failures for PCBs which do not have routes in
> the score line, (sore line is continuous),
> 2) What clearance from chip capacitors to score line should be followed as
> a guideline?
> 3) How should parts be oriented along a score line, parrallel or
> perpendicular?
>
>
> Mark
>
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