Brad's already covered most of this but the critical parameter here is what
is the minimum lateral conductor spacing you want on the finished product
between the plated hole wall and the adjacent trace, both of which are
conductors. The IPC 6012A spec (Table 1-10 says this should be .004").
To this you should add etched conductor tolerance (.0005"), drilled (not
plated) hole tolerance (.0002"), then the biggie, how much the innerlayers
move on the board. I don't know how many layers you have in your board but
let's just say your fabricator can place the drilled hole within .004"
radial position of the desired position on the IL. Add these tolerances
together and you have .0047". This means only .0023" mils between the
sidewall and your trace. If your happy with that then tell your fabricator
to go ahead. But in my opinion, that's not enough, especially given that
drilled hole walls don't provide 100% integrity.
You really need to figure out the answer to that first question, then work
with your fabricator to figure out the rest of the allowances.
This is why most fabricators don't like to see non-functional pads removed
until after the design is complete. That pad tells you where the hole can
be. Using the space for routing or even spacing is dangerous.
> ----------
> From: Rob Eason[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;Rob Eason
> Sent: Wednesday, September 18, 2002 1:41 PM
> To: [log in to unmask]
> Subject: Re: [TN] Close pitch PCB failure
>
> Brad,
> We are using .062 thick board (our standard). Currently we have .016
> drill,
> .012 PTH, .004 traces, .0055 distance. We have used Polyimide for many
> years, and have on small occasions used HiTemp FR-4, but I am uncertain
> whether maybe Polyimide should still be the way to go. I will approach our
> PCB supplier and ask if they felt they could get better results using the
> HT
> FR-4, but this will be something that all of our management will have to
> agree on, as we will be straying from the narrow path we have traveled on
> for so long. :o)
> Thanks for your input.
> Regards,
> Rob
>
> -----Original Message-----
> From: [log in to unmask] [mailto:[log in to unmask]]
> Sent: Wednesday, September 18, 2002 11:37 AM
> To: [log in to unmask]
> Subject: Re: [TN] Close pitch PCB failure
>
>
> Hello Rob,
>
> The nominal distance of .007 is tight. In the case of .8mm BGA the PCB
> planes will have an .0275 clearance and I have drilled .012 diameter holes
> in the .100 thick board. That renders .00775 PTH wall (drill wall) to
> edge
> of copper. It doesn't get much tighter than that. The same
> configuration;
> signal layers use a .019 diameter pad with the distance from PTH wall edge
> (drill) to edge of pad of .0035, with .004 trace and .004 spacing this
> renders .0075 PTH wall to trace edge. These are tight numbers and are
> BASIC;
> all that "slop" is the fabrication allowance. Increase those numbers by
> decreasing board thickness allowing a smaller drill diameter (aspect ratio
> <9/1).
> FR4 is the best material to achieve success. Polyimide usually brings on
> need for etch back and there simply is no real estate to do that.
> Thermount
> is wonderful material, but is best used for its propensity to have
> consistent lower Er and its mainstay is low XY CTE. I do not recommend
> its
> usage for these tight configurations. Folks used to recommend it because
> its very nice registration qualities, but that Kevlar may have micro
> ratcheting -in my opinion- and may induce the CAF condition.
> If your stuck in a tuff design I would recommend:
> 1. lower thickness (mils count)
> 2. decrease trace widths (half mils count)
> 3. FR4 170 deg C Tg stuff
> 4. new drills, one up
> 5. have a plan "B" ie redesign
> 6. group crossing of fingers
>
> Good luck,
> Boston Brad yer PCB pal
>
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