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October 1999

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From:
"Ingemar Hernefjord (EMW)" <[log in to unmask]>
Date:
Thu, 14 Oct 1999 08:25:15 +0200
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1.0
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"West, Jim" <[log in to unmask]>
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"TechNet E-Mail Forum." <[log in to unmask]>, "Ingemar Hernefjord (EMW)" <[log in to unmask]>
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Morning Jim,
we simply ask the CAD  engineer to cut out one sq inch of the PWB pattern. If the board is let's say 10"x15" the coupon can be 1sq" with good representation of artwork, e.g. part of a multilayer routing for a 400 I/O processor. With other words the test coupon is a small part of the board of interest. Then we encircle special problems with vias or what it can be for that product. Making a general coupon for all boards did not work well.
So, our method is not very remarkble, but it works. / Ingemar



Hi all,

Thanks to all that responded to my earlier test coupon question.  I have a
few more question, how do you specify test coupons?  What do I tell the
board layout guy?  What do I tell the board house?  Does everyone have test
coupons on all boards or only multilayer?  Any good advice on how to specify
would be great!

Thanks,

Jim West
Manufacturing Engineer

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