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From:
bill birch <[log in to unmask]>
Date:
Thu, 21 Nov 1996 13:07:00 -0800
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Gary and fellow technet users,

	First apologies for our delay in responding to your request for 
information regarding IST technology.  I have just returned from the west 
coast, where we were installing an IST system into a large PWB 
manufacturering facility.  I will repeat your question and comment below:

Gary Peterson wrote:
> 
> Has anyone heard of a test method for PWB process evaluation called
> Interconnect Stress Test (IST).  Have you tried it?  What do you think
> about its virtues/shortcomings?
> 
> Gary P.  SANDIA NATIONAL LABORATORIES  
 	Interconnect Stress Testing (IST) technology evolved from the 
original electrical stress test concept called "power cycling", developed 
by Rama Munikoti (et al) at Northern Telecom in 1987.  At that time I 
worked at N.T. and with Rama developed test vehicles with known good and 
bad levels of PTH quality, to determine the viability of the concept.

	The initial results showed great promise and a white paper was 
written to discuss the results.  In 1989 I joined Digital Equipment 
Corporation of Canada, and soon after established a joint development 
program between N.T and DEC, to re-create the same capability to 
determine the repeatability and reproducibility of power cycling.  The 
results identified lower than acceptable correlation.  N.T. elected to 
discontinue further development and DEC "went it alone", to understand 
how to achieve excellent repeatability and correlation with industry 
standard test methods (thermal ovens).

	We developed new principles (and a new name), new coupon designs 
and totally automated the test method.  Our internal motivation was to 
develop a faster, cheaper, more repeatable accelerated stress test method 
to quantify the integrity of the VAX 9000 backplanes produced at our 
Greenville PWB facility.  The 9000 was the DEC entry into the super 
computer market, and measured 48" x 36", 24 layers, .250" thick, with 
blind and buried vias and hard gold finish over the total board surface.
We were mounting 16 MCM's and 68 separable interconnect flex onto the 
surface of each backplane.  IST was developed as the tool to characterize 
the manufacturing process and qualify the integrity of the interconnect. 
 
	We started with IPC in 1992, and estabished a test plan to 
determine the correlation of new test methods to thermal ovens (basically 
a repeat of the IPC-TR-579).  The new technologies included 3 electrical 
stress test methods and an accelerated fludized sand method.  The IPC PTV 
committee is presently trying to compile all the data.  Problems have 
been encountered primarily related to the extended time-frame to complete 
all the work, which included testing, failure analysis, statisical 
analysis and a miriad of other factors associated to a round robin that 
has taken 4 years to complete.

	In the interim IST was made available to the PWB industry through 
a testing service.  Customers would submit products to the DEC failure 
analysis labs.  IST was completed, in conjunction with Mil Std Thermal 
cycling.  Excellent correlation was achieved and identical failure modes 
and mechanisms were found between the different methods.

	In 1994, new IST principles were developed to establish the 
capability to detect inner-layer (post) to PTH barrel separations.  
Working with Circo Craft, we re-create numerous types and levels of post 
separations within the interconnect.  

	The system electrically stresses and monitors both the PTH and 
post interconnects independently, creating 2 "dimensions" of failure.  
The system clearly identifies whether the PTH or the post interconnect 
are degrading as individual failure mechanisms, or whether there are 
interactions between the different failure mechanisms.  

	We have received extensive interest for this capability, 
generally related to evaluating the integrity of direct metallizations 
when compared to traditional electroless coppers.  We recently completed 
a study that compared the performance of 25 different metallizations with 
both IST testing and microsection analysis (completed by Robisan Labs).  
The results showed excellent correction between the two methods, a white 
paper is available through the IPC (and it should be in the next issue of 
Circuitree).

	Our most recent activities are working with the Automotive 
industry to correlate with their 1000 hour thermal cycling test.  
Multiple studies on chemical and material DOE's.  Establishing IST as the 
preferred method for quantifying the integrity of microvias (our test 
vehicle measures 5" x 0.5" and contains 5,400 microvias).  

	Using IST as an electrical test delivers a capability to remove 
the human factor from the decision making process of product acceptance 
or rejection.  The test rapidly quantifies whether any "flaw" within the 
interconnect has a detrimental impact on the total interconnect 
integrity.  We are starting to understand the "hierarchy of failure", the 
test method will demonstrate which are dominant and which are latent 
failure mechanism.  

	The technology is now being deployed to multiple PWB 
manufacturers across North America, we plan on establishing a user group 
to compile a data base of information on product integrity/performance.  
This information can be used to establish whether existing standards are 
effective at specifying realistic acceptance/rejection criteria, with 
regard to the "total" performance of the interconnect.

	Sorry if this dragged on a little, jet lags setting in fast.  If 
you require additional information on IST you can send me an Email, or
phone 819-684-9849

	Regards

	Bill Birch
	PWB Interconnect Solutions Inc.

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