Tom,

I agree with your answer to small via's except for one important area.
  Small via's should NOT be allowed to be plated shut.  As you know, 
the corners of the holes are high current areas and plate shut before 
the rest of the hole can close.  This will result in the trapping of 
plating solutions (sulphuric acid and copper sulphate) in the middle 
of the hole that can leach out during the life of the board.

To reduce the high current area, plating amperage may have to be 
reduced requiring longer plating cycles and increased board cost.

IMO, tolerancing on via holes should be as follows:  .018 +.003 minus 
.013 or .013 + .003 minus .008, etc., always leaving a hole open to a 
minimum of .005 for plating solutions to escape during HASL or any 
other surface finish.  Then there should be another note on the 
drawing as follows:

DO NOT PLATE THE HOLES CLOSED WITH COPPER.  HOLES MAY BE FILLED WITH 
SOLDER AFTER REFLOW OR HASL.

Norm Einarson
Printed Circuit Technology 

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