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December 1998

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Sender:
TechNet <[log in to unmask]>
Date:
Tue, 8 Dec 1998 09:28:22 +0000
Reply-To:
"TechNet E-Mail Forum." <[log in to unmask]>, John Parsons <[log in to unmask]>
Content-type:
text/plain; charset=US-ASCII
Subject:
FAB: Solder Filled Thermal Vias
MIME-Version:
1.0
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7BIT
Organization:
Circuit Graphics Ltd.
From:
John Parsons <[log in to unmask]>
Parts/Attachments:
text/plain (24 lines) 
Good Morning,

I am looking for process information on filling vias (12mil) using a
vertical HAL process for the purposed of heat dissipation.

Ideas, successes, failures - all replies welcome.

Regards

John Parsons
Circuit Graphics Ltd.

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