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1996

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Subject:
From:
"Magee, Andrew P" <[log in to unmask]>
Date:
Mon, 19 Feb 1996 08:47:00 -0800
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---------------------------- Forwarded with Changes ---------------------------
From: Steven Holzinger at Rogers-MCD
Date: 2/19/96 8:21AM
To: Marc Beulque at ROGERS-MEKTRON
cc: Sheryl L. Dehning-Brown at Rogers-MCD
cc: Rick Jansen at Rogers-MCD
cc: Dick Traskos at Rogers-R&D
cc: Andrew P Magee at Rogers-MCD
Subject: Re: LOC Tape - Siemens Regensburg
-------------------------------------------------------------------------------
     Lead On Chip (LOC) Tape is use to position chips on lead frames prior
     to interconnecting and encapsulation. We're not familiar with the IPC
     documents specific to this application. What are the five moisture
     levels for LOC Tape? Any information would be appreciated.


     Andy Magee - Applications Engineer
     Rogers Corp - Circuit Materials Unit
     Tel: (602) 917-5237
     Fax: (602) 917-5256
     E-Mail: [log in to unmask]


______________________________ Reply Separator _________________________________

Subject: LOC Tape
Author:  Steven Holzinger at Rogers-MCD
Date:    2/14/96 3:57 PM


     They are apparently testing every LOC tape known in order to make
     their choice, maybe within the next 2 or 3 weeks...

     We found that they referred to a spec or document from IPC which
     defines 5(?) moisture levels for tapes. We are trying to get a copy of
     the document from them; in the meantime, are you familiar with such a
     spec?

     They are saying that "everyone in the tape business" seems to be
     working to "level 3," except a few who are working to "level 1," the
     toughest requirement.

     Would appreciate hearing whatever you know of this. Thanks.

     -Steve



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